DZ has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81835?usp=email )
Change subject: flashchips: Add support for MXIC MX25L1636E ......................................................................
flashchips: Add support for MXIC MX25L1636E
The MX25L1636E has been tested by ch341a programmer : read, write, erase and wp.
We have tested --wp-enable, --wp-disable, --wp-list and --wp-range commands for write-protect feature.
MX25L1636E datasheet is available at the following URL: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8596/MX25L1636E,%203V,%2...
Change-Id: I415e2d6c89d3d59ba44e22753001c6f69421c39d Signed-off-by: DanielZhang danielzhang@mxic.com.cn --- M flashchips.c 1 file changed, 11 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/35/81835/1
diff --git a/flashchips.c b/flashchips.c index 7a40f07..c60770b 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9274,15 +9274,15 @@
{ .vendor = "Macronix", - .name = "MX25L1635E", + .name = "MX25L1635E/MX25L1636E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L1635E, .total_size = 2048, .page_size = 256, /* OTP: 64B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = @@ -9306,6 +9306,14 @@ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, },
{