Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/51734 )
Change subject: flashchips.c: mark EN25S64 as TESTED_OK_PREW ......................................................................
flashchips.c: mark EN25S64 as TESTED_OK_PREW
The chip was marked as TESTED_OK_PREW in the cros tree by `commit b2f900273aac329b82089e4dbc5a8ba3d032fff0`.
Quoting from the original commit message:
TEST=read and write BIOS on glimmer with Eon device.
Change-Id: I13dc3e6bde9e4581fdd5856a412918784b913fbc Signed-off-by: Nikolai Artemiev nartemiev@google.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/51734 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Edward O'Callaghan quasisec@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
diff --git a/flashchips.c b/flashchips.c index d47871d..1e0c489 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5441,7 +5441,7 @@ .page_size = 256, /* OTP: 512B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers =