Change in flashrom[master]: [RFC] add support for Intel EmmitsBurg PCH

[Jonathan Zhang (Code Review)]

Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/54965 )

Change subject: [RFC] add support for Intel EmmitsBurg PCH
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[RFC] add support for Intel EmmitsBurg PCH

Add PCIe ID for Intel EmmitsBurg PCH.

Based on ICH descriptor content, force choose CHIPSET_C620_SERIES_LEWISBURG
which seems to work.

TESTED=tried on a server with Intel EmmitsBurg PCH, flash update
was successful. This server, however, does not have flash chip
installed, it instead has em100 emulator connected.

Change-Id: I2a1bb7467e693d1583aa885fa0e277075edd4a3e
Signed-off-by: Jonathan Zhang 
---
M chipset_enable.c
M ich_descriptors.c
2 files changed, 5 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/54965/1

diff --git a/chipset_enable.c b/chipset_enable.c
index cdd51ae..b47b2db 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2073,6 +2073,7 @@
    {0x8086, 0xa247, B_S,    NT,  "Intel", "C620 Series Chipset Supersku",	enable_flash_c620},
    {0x8086, 0xa248, B_S,    NT,  "Intel", "C620 Series Chipset Supersku",	enable_flash_c620},
    {0x8086, 0xa249, B_S,    NT,  "Intel", "C620 Series Chipset Supersku",	enable_flash_c620},
+	{0x8086, 0x1bca, B_S,    NT,  "Intel", "EmmitsBurg Chipset SKU",	enable_flash_c620},
    {0x8086, 0xa2c4, B_S,    NT,  "Intel", "H270",				enable_flash_pch100},
    {0x8086, 0xa2c5, B_S,    NT,  "Intel", "Z270",				enable_flash_pch100},
    {0x8086, 0xa2c6, B_S,    NT,  "Intel", "Q270",				enable_flash_pch100},
diff --git a/ich_descriptors.c b/ich_descriptors.c
index a6ac881..1c82328 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -934,6 +934,8 @@
    			msg_pwarn("Peculiar firmware descriptor, assuming Apollo Lake compatibility.\n");
    		return CHIPSET_APOLLO_LAKE;
    	}
+		else if (content->ISL == 80)
+			return CHIPSET_C620_SERIES_LEWISBURG;
    	msg_pwarn("Peculiar firmware descriptor, assuming Ibex Peak compatibility.\n");
    	return CHIPSET_5_SERIES_IBEX_PEAK;
    } else if (content->ICCRIBA < 0x31 && content->FMSBA < 0x30) {
@@ -986,7 +988,8 @@
    			  "However, the read frequency isn't set to 17MHz (the only valid value).\n"
    			  "Please report this message, the output of `ich_descriptors_tool` for\n"
    			  "your descriptor and the output of `lspci -nn` to [e-mail]\n\n");
-			return CHIPSET_9_SERIES_WILDCAT_POINT;
+			return guess;
+//			return CHIPSET_9_SERIES_WILDCAT_POINT;
    	}
    	return guess;
    default: