Attention is currently required from: Anastasia Klimchuk, Stefan Reinauer, Subrata Banik.
Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81356?usp=email )
Change subject: ich: Add names for region 5, 9, 10, 11, 12, 15 ......................................................................
Patch Set 7:
(3 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/81356/comment/e7537cce_2bc11460 : PS1, Line 12: * Incorporate missing region names from https://github.com/coreboot/coreboot/blob/main/util/ifdtool/ifdtool.c for completeness.
Just wanted to follow up on this, since the patch is waiting for a while. […]
Unfortunately, I don't have specific knowledge about 'flash descriptor V2' to help with this.
These patches were tested on MTL (Core Ultra) to ensure Region 9 access. We verified this through local testing, and the `flashrom -VV` command correctly displayed BIOS read/write access permissions for Region 9, which is critical to MTL.
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/81356/comment/53cc33b4_9cf166e1 : PS7, Line 558: 10GbE FYR: C620
File util/ich_descriptors_tool/ich_descriptors_tool.c:
https://review.coreboot.org/c/flashrom/+/81356/comment/a3f2bab4_853ae67c : PS5, Line 42: 10GbE0
This one occurrence that I noticed when the new name is different from the old one. […]
I could only find 2:
1. The one in ich_descriptors.c#442: This table seems to be a summary table, so only include the most frequently occurring names. (Update with 10GbE0, 10GbE1)
2. The one in ichspi.c#558: This table is for Intel C620. See https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/c620... datasheet page 1904, they only have one 10GbE and they have OPROM (option ROM)
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Hsuan-ting Chen (Code Review)