[S] Change in flashrom[master]: flashchips.c: remove WREN from GD25Q256D enter 4BA sequence

[Nikolai Artemiev (Code Review)]

Attention is currently required from: Nico Huber, Edward O'Callaghan, Anastasia Klimchuk, Eric Lai.

Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70342 )

Change subject: flashchips.c: remove WREN from GD25Q256D enter 4BA sequence
......................................................................

Patch Set 3:

(4 comments)

Commit Message:

https://review.coreboot.org/c/flashrom/+/70342/comment/33bf1f6c_00b366e9 
PS1, Line 9: CB:35480
> please use commit hash.

Done

https://review.coreboot.org/c/flashrom/+/70342/comment/a81c539c_958bf2d4 
PS1, Line 15: Coreboot issue
> Ticket […]

Done

https://review.coreboot.org/c/flashrom/+/70342/comment/cf221c18_bc8a6aa5 
PS1, Line 19: FT2232H
> This programmer also supports native 4BA commands which are probably […]

Ok interesting, I wrote a little test case:

```
static void print_sr(struct flashctx *flash)
{
    uint8_t value;
    int ret = spi_read_register(flash, STATUS1, &value);
    printf("SR1=0x%02x ret=%d\n", value, ret);
    ret = spi_read_register(flash, STATUS2, &value);
    printf("SR2=0x%02x ret=%d\n", value, ret);
    ret = spi_read_register(flash, STATUS3, &value);
    printf("SR3=0x%02x ret=%d\n\n", value, ret);
}

static void test(struct flashctx *flash)
{
    printf("Power-up state:\n");
    print_sr(flash);

int ret = spi_enter_exit_4ba(flash, false);
    printf("Exit 4BA ret=%d\n", ret);
    print_sr(flash);

ret = spi_enter_exit_4ba(flash, true);
    printf("Enter 4BA ret=%d\n", ret);
    print_sr(flash);

ret = spi_enter_exit_4ba(flash, false);
    printf("Exit 4BA ret=%d\n", ret);
    print_sr(flash);

}
```

Here are the results:

```
# FEATURE_4BA:

Power-up state:
SR1=0x00 ret=0
SR2=0x00 ret=0
SR3=0x20 ret=0

Exit 4BA ret=0
SR1=0x00 ret=0
SR2=0x00 ret=0
SR3=0x20 ret=0

Enter 4BA ret=0
SR1=0x00 ret=0
SR2=0x01 ret=0
SR3=0x20 ret=0

Exit 4BA ret=0
SR1=0x00 ret=0
SR2=0x00 ret=0
SR3=0x20 ret=0
```

```
# FEATURE_4BA_WREN:

Power-up state:
SR1=0x00 ret=0
SR2=0x00 ret=0
SR3=0x20 ret=0

Exit 4BA ret=0
SR1=0x02 ret=0
SR2=0x00 ret=0
SR3=0x20 ret=0

Enter 4BA ret=0
SR1=0x02 ret=0
SR2=0x01 ret=0
SR3=0x20 ret=0

Exit 4BA ret=0
SR1=0x02 ret=0
SR2=0x00 ret=0
SR3=0x20 ret=0
```

So it is able to set the ADS bit with or without WREN. The bit that's always set in SR3 is DRV0, which defaults to 1 according to the datasheet. Just to be sure I set it to 0 (i.e. `spi_write_register(flash, STATUS3, 0)` and reran the test:

```
# FEATURE_4BA, DRV0 cleared:

Power-up state:
SR1=0x00 ret=0
SR2=0x00 ret=0
SR3=0x00 ret=0

Exit 4BA ret=0
SR1=0x00 ret=0
SR2=0x00 ret=0
SR3=0x00 ret=0

Enter 4BA ret=0
SR1=0x00 ret=0
SR2=0x01 ret=0
SR3=0x00 ret=0

Exit 4BA ret=0
SR1=0x00 ret=0
SR2=0x00 ret=0
SR3=0x00 ret=0
```

Patchset:

PS1:
> You forgot to add the topic! I am marking this unresolved so that the comment is more visible.

Done