Change in flashrom[master]: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq

[Edward O'Callaghan (Code Review)]

Attention is currently required from: Patrick Georgi, Stefan Reinauer, Angel Pons, Sridhar Siricilla, Alex Levin, YH Lin, Nico Huber, Martin Roth, Subrata Banik, Caveh Jalali, David Hendricks, Tim Wawrzynczak, Nick Vaccaro, Boris Mittelberg.
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61854 )

Change subject: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq
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Patch Set 14: Code-Review+2

(1 comment)

Commit Message:

https://review.coreboot.org/c/flashrom/+/61854/comment/622ccce1_999f062b 
PS7, Line 25: TEST=Concurrent flashrom access is not throwing timeout.
> > > > > > Please let me know if anything we need to help for moving this CL? […]

Eve was tested which is the Kabylake-Y uarch, navigating the Intel marketing matrix here but that comes out as a 100 series pch to me so more or less ich9 in older terminology. I think that is the oldest we are able to locally test.

Seems resolved AFAIK. Although do reach out on the IRC channel Subrata if at all possible just in case someone happens to have something extremely old available.

I will ping damo22 out of band who happens to have some very old Intel stuff.