Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Subrata Banik.
Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81357?usp=email )
Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ......................................................................
Patch Set 12:
(11 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/81357/comment/6d3a3826_39bbca85 : PS10, Line 28:
Is MTL a Meteor Lake and ADL Alder Point?
YES
Sure, let me add a test for APL. (apollo lake)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/81357/comment/5ba96866_bb53f848 : PS10, Line 1853: mmio_readw
Why it is `readw` (reads into uint16_t) here, but `readl` below (reads into uint32_t)? […]
You could see the document of Intel Core Ultra:
For `BIOS_BM_RAP` and `BIOS_BM_WAP`:
https://edc.intel.com/content/www/de/de/design/publications/14th-generation-... ``` +-----------+--------------------------------------+ | Bit Range | Filed Name and Description | +-----------+--------------------------------------+ | 31:16 | Reserved | +-----------+--------------------------------------+ | 15:0 | BIOSS Master Read Access Permissions | +-----------+--------------------------------------+ ``` As only bits 15:0 are meaningful, using `mmio_readw()` (which reads 16 bits) is sufficient. (There are also a maximum of 15 regions at present.)
For `FRAP`:
https://www.intel.sg/content/dam/doc/datasheet/io-controller-hub-9-datasheet...
page 827 ``` +-----------+--------------------------------------+-------------+ | Bit Range | Filed Name and Description | In flashrom | +-----------+--------------------------------------+-------------+ | 31:24 | BIOS Master Write Access Grant | ICH_BMWAG() | +-----------+--------------------------------------+-------------+ | 23:16 | BIOS Master Read Access Grant | ICH_BMRAG() | +-----------+--------------------------------------+-------------+ | 15:8 | BIOS Region Write Access | ICH_BRWA() | +-----------+--------------------------------------+-------------+ | 7:0 | BIOS Region Read Access | ICH_BRRA() | +-----------+--------------------------------------+-------------+ ``` As we need all 32 bits, using `mmio_readl()` (which reads 32 bits) is necessary.
Therefore, I suggest using `region_read_access` and `region_write_access` as `uint16_t*`, rather than changing any of the current `mmio_read` functions.
https://review.coreboot.org/c/flashrom/+/81357/comment/bafbee7d_a43f666b : PS10, Line 1854: *region_write_access = mmio_readw(ich_spibar + ICH_REG_BIOS_BM_WAP);
Maybe you can also add some debugging prints in this branch too
Done
https://review.coreboot.org/c/flashrom/+/81357/comment/7ab01994_497a6e1e : PS10, Line 1876: inline
I don't think this needs to be inline?
Done
Could I know if there's any concern of inline it?
https://review.coreboot.org/c/flashrom/+/81357/comment/4467c8a7_b696bbcc : PS10, Line 1877: if (ich_generation >= CHIPSET_METEOR_LAKE) : return 16; : return 8;
maybe make it one line […]
Done
https://review.coreboot.org/c/flashrom/+/81357/comment/d08d8da3_5a41563d : PS10, Line 2109: case CHIPSET_METEOR_LAKE:
Let's re-order Meteor Lake here too
Done
https://review.coreboot.org/c/flashrom/+/81357/comment/3f3bbbae_7ad5fcd5 : PS10, Line 2149: case CHIPSET_METEOR_LAKE:
and here
Done
https://review.coreboot.org/c/flashrom/+/81357/comment/4d25f45a_f00ff889 : PS10, Line 2211: case CHIPSET_METEOR_LAKE:
and here
Done
https://review.coreboot.org/c/flashrom/+/81357/comment/dddfd728_c6289bb2 : PS10, Line 2229:
you can leave the word "registers", so that it is "... […]
Done
https://review.coreboot.org/c/flashrom/+/81357/comment/099ee78e_80fb4172 : PS10, Line 2291: case CHIPSET_METEOR_LAKE:
and here
Done
https://review.coreboot.org/c/flashrom/+/81357/comment/1e511f27_37e13d65 : PS10, Line 2331: case CHIPSET_METEOR_LAKE:
and here
Done