Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Peter Marheine.
Brian Norris has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/80807?usp=email )
Change subject: flashrom: Don't throw around "delay 1 second" so lightly ......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS1:
I think that recommendation should be captured in some kind of changelog so there's "real" documentation of the change, though.
Done
Erase operation verifies the chip straight away after erasing. Without any delay. (Also without respecting the noverify flags, but this we will fix later). From the chip point of view, erase is almost the same as write, is that correct? So maybe the erase flow is kind of a "proof-of-concept" for what this patch is doing?
Yeah, you might have a point. I noted this in the commit message now.
I completely forgot that write and verify can be separated in a manual workflow, so silly of me. This changes the situation, maybe we don't need a special option.
Cool, less work for me :)
do you want me to start such a mailing list thread, or were you suggesting I do this?
Brian, you gave me two options which are the same :)
Haha, of course I had to fudge my words :)
Anyway, I've done both of them now :)
https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/SFV3O...