Change in flashrom[master]: ichspi: Define `Write Enable Type (WET)` register under HSFC

[Anastasia Klimchuk (Code Review)]

Attention is currently required from: Nico Huber, Subrata Banik, Edward O'Callaghan, Angel Pons.
Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62888 )

Change subject: ichspi: Define `Write Enable Type (WET)` register under HSFC
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Patch Set 3:

(3 comments)

Commit Message:

https://review.coreboot.org/c/flashrom/+/62888/comment/95da038f_1a38a628 
PS3, Line 13: brya
What chipset brya has? It would be useful to have this info in commit message.

Patchset:

PS3: 
This change should not change the binary, is it right? (please tell me if I am wrong)

You can build the binary before and after the patch and verify there are no diffs

make clean && make CONFIG_EVERYTHING=yes VERSION=none`
 diff binary_before binary_after

File ichspi.c:

https://review.coreboot.org/c/flashrom/+/62888/comment/79929f64_2d479b8a 
PS3, Line 83: /* New HSFC Control bit */
This comment should be moved too?