Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/49229 )
Change subject: flashchips.c: Mark GD25LQ128C/D as TEST_OK_PREW ......................................................................
flashchips.c: Mark GD25LQ128C/D as TEST_OK_PREW
I have successfully probed/read/erased/written a GD25LQ128D, so marking this entry as tested.
Signed-off-by: Alan Green avg@google.com Change-Id: Ic5329ebe81b6c1eabfb594f7f7affb3fd460db6b Reviewed-on: https://review.coreboot.org/c/flashrom/+/49229 Reviewed-by: Edward O'Callaghan quasisec@chromium.org Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
diff --git a/flashchips.c b/flashchips.c index 7590dff..38b0bfd 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6242,7 +6242,7 @@ .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers =