Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
chipset_enable.c: Add CMP-H IDs
This patch adds CMP-H support. They are HM470, WM490, QM480, W480, H470, Z490 and Q470.
TEST=build flashrom and run on CML-S with CMP-H flashrom -p internal -w ./coreboot.rom reboot and check the code is flashed correctly
Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f --- M chipset_enable.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37677/1
diff --git a/chipset_enable.c b/chipset_enable.c index b55852c..62a19af 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2046,6 +2046,13 @@ {0x8086, 0xa30c, B_S, NT, "Intel", "QM370", enable_flash_pch300}, {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, + {0x8086, 0x068d, B_S, NT, "Intel", "HM470", enable_flash_pch300}, + {0x8086, 0x068e, B_S, NT, "Intel", "WM490", enable_flash_pch300}, + {0x8086, 0x068c, B_S, NT, "Intel", "QM480", enable_flash_pch300}, + {0x8086, 0x0697, B_S, NT, "Intel", "W480", enable_flash_pch300}, + {0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch300}, + {0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch300}, + {0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch300}, #endif {0}, };
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 1:
Looks like this would need a manual rebase? It currently displays as "Merge Conflict"
Gaggery Tsai has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 1:
oops.. seems like I overlooked the message. I'm doing it but somehow it said I have no permission to submit. Nico, I don't see SPI changes between 300 and 400 SERIES, the majority of changes are in ISH and CNVI.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 1:
Patch Set 1:
oops.. seems like I overlooked the message. I'm doing it but somehow it said I have no permission to submit. Nico, I don't see SPI changes between 300 and 400 SERIES, the majority of changes are in ISH and CNVI.
I can't submit this change because it does not apply cleanly on current master of flashrom.
Gaggery Tsai has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 1:
Patch Set 1:
Patch Set 1:
oops.. seems like I overlooked the message. I'm doing it but somehow it said I have no permission to submit. Nico, I don't see SPI changes between 300 and 400 SERIES, the majority of changes are in ISH and CNVI.
I can't submit this change because it does not apply cleanly on current master of flashrom.
Anything I should do to gain the permission? I don't have same issue for coreboot.
remote: Resolving deltas: 100% (2/2) remote: error: branch refs/heads/master: remote: To push into this reference you need 'Push' rights. remote: User: gaggery remote: Contact an administrator to fix the permissions remote: Processing changes: refs: 1, done To https://review.coreboot.org/flashrom ! [remote rejected] master -> master (prohibited by Gerrit: not permitted: update) error: failed to push some refs to 'https://review.coreboot.org/flashrom'
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 1:
Patch Set 1:
Patch Set 1:
Patch Set 1:
oops.. seems like I overlooked the message. I'm doing it but somehow it said I have no permission to submit. Nico, I don't see SPI changes between 300 and 400 SERIES, the majority of changes are in ISH and CNVI.
I can't submit this change because it does not apply cleanly on current master of flashrom.
Anything I should do to gain the permission? I don't have same issue for coreboot.
remote: Resolving deltas: 100% (2/2) remote: error: branch refs/heads/master: remote: To push into this reference you need 'Push' rights. remote: User: gaggery remote: Contact an administrator to fix the permissions remote: Processing changes: refs: 1, done To https://review.coreboot.org/flashrom ! [remote rejected] master -> master (prohibited by Gerrit: not permitted: update) error: failed to push some refs to 'https://review.coreboot.org/flashrom'
Oh, I thought you meant submit permissions in Gerrit. Try this:
git push origin HEAD:refs/for/master
Hello build bot (Jenkins), Duncan Laurie,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/37677
to look at the new patch set (#2).
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
chipset_enable.c: Add CMP-H IDs
This patch adds CMP-H support. They are HM470, WM490, QM480, W480, H470, Z490 and Q470.
TEST=build flashrom and run on CML-S with CMP-H flashrom -p internal -w ./coreboot.rom reboot and check the code is flashed correctly
Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f --- M chipset_enable.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37677/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/flashrom/+/37677/2/chipset_enable.c File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/37677/2/chipset_enable.c@2050 PS2, Line 2050: {0x8086, 0x068d, B_S, NT, "Intel", "HM470", enable_flash_pch300}, : {0x8086, 0x068e, B_S, NT, "Intel", "WM490", enable_flash_pch300}, : {0x8086, 0x068c, B_S, NT, "Intel", "QM480", enable_flash_pch300}, : {0x8086, 0x0697, B_S, NT, "Intel", "W480", enable_flash_pch300}, : {0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch300}, : {0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch300}, : {0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch300}, Should the list be sorted after the ID?
Attention is currently required from: Gaggery Tsai. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2: Would it be possible to get this updated? I'd like to get support for HM470 added.
Attention is currently required from: Gaggery Tsai, Tim Crawford. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 3: Code-Review+1
(1 comment)
Patchset:
PS2:
Would it be possible to get this updated? I'd like to get support for HM470 added.
Rebased on master. Please verify that reading and writing works.
Attention is currently required from: Gaggery Tsai, Tim Crawford. Felix Singer has uploaded a new patch set (#4) to the change originally created by Gaggery Tsai. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
chipset_enable.c: Add CMP-H IDs
This patch adds CMP-H support. They are HM470, WM490, QM480, W480, H470, Z490 and Q470.
TEST=build flashrom and run on CML-S with CMP-H flashrom -p internal -w ./coreboot.rom reboot and check the code is flashed correctly
Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f --- M chipset_enable.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37677/4
Attention is currently required from: Gaggery Tsai, Tim Crawford, Paul Menzel. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 4:
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/37677/comment/61e68642_c6fd260d PS2, Line 2050: {0x8086, 0x068d, B_S, NT, "Intel", "HM470", enable_flash_pch300}, : {0x8086, 0x068e, B_S, NT, "Intel", "WM490", enable_flash_pch300}, : {0x8086, 0x068c, B_S, NT, "Intel", "QM480", enable_flash_pch300}, : {0x8086, 0x0697, B_S, NT, "Intel", "W480", enable_flash_pch300}, : {0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch300}, : {0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch300}, : {0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch300},
Should the list be sorted after the ID?
Done
Attention is currently required from: Felix Singer, Gaggery Tsai, Tim Crawford, Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/37677/comment/21068056_49681189 PS4, Line 2088: enable_flash_pch300 enable_flash_pch400
Attention is currently required from: Felix Singer, Gaggery Tsai, Tim Crawford, Paul Menzel. Felix Singer has uploaded a new patch set (#5) to the change originally created by Gaggery Tsai. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
chipset_enable.c: Add CMP-H IDs
This patch adds CMP-H support. They are HM470, WM490, QM480, W480, H470, Z490 and Q470.
TEST=build flashrom and run on CML-S with CMP-H flashrom -p internal -w ./coreboot.rom reboot and check the code is flashed correctly
Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f --- M chipset_enable.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37677/5
Attention is currently required from: Gaggery Tsai, Tim Crawford, Paul Menzel, Angel Pons. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5:
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/37677/comment/b9155cc2_38d053cb PS4, Line 2088: enable_flash_pch300
enable_flash_pch400
Done
Attention is currently required from: Felix Singer, Gaggery Tsai, Tim Crawford, Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5: Code-Review+1
Attention is currently required from: Felix Singer, Gaggery Tsai, Tim Crawford, Paul Menzel. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5: Code-Review+1
(1 comment)
Patchset:
PS5: Please also test descriptor detection and dumping.
Attention is currently required from: Felix Singer, Gaggery Tsai, Tim Crawford, Matt DeVillier, Paul Menzel. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
Patch Set 1:
Thanks for your patch!
I couldn't find a SPI Guide for CMP-H. Nowadays it's part of the ME Kit, but there seems to be none yet.
Judging from the CMP-LP guide, there may be little changes to the FLMAP* fields in the descriptor. It would be nice to know if there were also changes for CMP-H and have ich_descriptors.* updated in case. We might have to add it as CHIPSET_400_SERIES_...
Looks like this is still unattended. I've access to a CMP-H SPI guide now and there is (same as for the -LP) an FLMAP3 with version information.
Please check descriptor dumps and update the code accordingly.
Attention is currently required from: Felix Singer, Gaggery Tsai, Matt DeVillier, Paul Menzel. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS2:
Rebased on master. Please verify that reading and writing works.
Tested reading and writing flash image works on system76/oryp6 (HM470).
Attention is currently required from: Felix Singer, Gaggery Tsai, Matt DeVillier, Paul Menzel. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5: Code-Review+1
Attention is currently required from: Gaggery Tsai, Tim Crawford, Matt DeVillier, Paul Menzel. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
Patch Set 1: […]
@Tim: There is still one todo left.
Attention is currently required from: Felix Singer, Gaggery Tsai, Nico Huber, Matt DeVillier, Paul Menzel. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
@Tim: There is still one todo left.
What commands do I need to run to get the info?
Attention is currently required from: Felix Singer, Gaggery Tsai, Nico Huber, Matt DeVillier, Paul Menzel. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
What commands do I need to run to get the info?
Output of ich_descriptor_tools: https://dpaste.org/2Z8E
Attention is currently required from: Felix Singer, Gaggery Tsai, Tim Crawford, Matt DeVillier, Paul Menzel. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
Patch Set 5: Code-Review+2
(1 comment)
Patchset:
PS5:
Output of ich_descriptor_tools: https://dpaste. […]
Looks good. Thanks.
For future reference: I've also looked at a descriptor (oryp6) and there's indeed an FLMAP3 but it's all 0.
Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/37677 )
Change subject: chipset_enable.c: Add CMP-H IDs ......................................................................
chipset_enable.c: Add CMP-H IDs
This patch adds CMP-H support. They are HM470, WM490, QM480, W480, H470, Z490 and Q470.
TEST=build flashrom and run on CML-S with CMP-H flashrom -p internal -w ./coreboot.rom reboot and check the code is flashed correctly
Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f Reviewed-on: https://review.coreboot.org/c/flashrom/+/37677 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Tim Crawford tcrawford@system76.com Reviewed-by: Nico Huber nico.h@gmx.de --- M chipset_enable.c 1 file changed, 7 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve Tim Crawford: Looks good to me, but someone else must approve
diff --git a/chipset_enable.c b/chipset_enable.c index 4e52092..5a1129d 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2085,6 +2085,13 @@ {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, {0x8086, 0x3482, B_S, DEP, "Intel", "Ice Lake U Premium", enable_flash_pch300}, + {0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch400}, + {0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch400}, + {0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch400}, + {0x8086, 0x068c, B_S, NT, "Intel", "QM480", enable_flash_pch400}, + {0x8086, 0x068d, B_S, NT, "Intel", "HM470", enable_flash_pch400}, + {0x8086, 0x068e, B_S, NT, "Intel", "WM490", enable_flash_pch400}, + {0x8086, 0x0697, B_S, NT, "Intel", "W480", enable_flash_pch400}, #endif {0}, };