Timothy Pearson has uploaded a new change for review. ( https://review.coreboot.org/19526 )
Change subject: Obtain correct virtual address for 32-bit BARs on PPC ......................................................................
Obtain correct virtual address for 32-bit BARs on PPC
PowerPC systems have the ability to map 32-bit BARs into 64-bit host windows. Reading the BAR directly from the hardware is insufficient on these machines; use the libpci deb->base_addr[x] mechanism instead.
Change-Id: I7a37ae98f54aab62e0937985220d1dcd097109f3 Signed-off-by: Timothy Pearson tpearson@raptorengineering.com --- M pcidev.c 1 file changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/26/19526/1
diff --git a/pcidev.c b/pcidev.c index 2c78063..34b948b 100644 --- a/pcidev.c +++ b/pcidev.c @@ -37,11 +37,13 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) { uint64_t addr; - uint32_t upperaddr; uint8_t headertype; uint16_t supported_cycles; enum pci_bartype bartype = TYPE_UNKNOWN;
+#ifndef __PPC64__ + uint32_t upperaddr; +#endif
headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f; msg_pspew("PCI header type 0x%02x\n", headertype); @@ -97,6 +99,12 @@ switch (bartype) { case TYPE_MEMBAR: msg_pdbg("MEM"); +#ifdef __PPC64__ + /* PowerPC is able to translate 32-bit BARs into 64-bit host windows. + * Use the dev->base_addr[x] mechanism to handle mapping. + */ + addr = dev->base_addr[(bar - 0x10) / 0x4] & PCI_BASE_ADDRESS_MEM_MASK; +#else if (!(supported_cycles & PCI_COMMAND_MEMORY)) { msg_perr("MEM BAR access requested, but device has MEM space accesses disabled.\n"); /* TODO: Abort here? */ @@ -122,6 +130,7 @@ } } addr &= PCI_BASE_ADDRESS_MEM_MASK; +#endif break; case TYPE_IOBAR: msg_pdbg("I/O\n");