[S] Change in flashrom[main]: flashchips: Add write protect function support for MX25R1635F

[DZ (Code Review)]

DZ has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81840?usp=email )

Change subject: flashchips: Add write protect function support for MX25R1635F
......................................................................

flashchips: Add write protect function support for MX25R1635F

The MX25R1635F has been tested by ch341a programmer : read, write,
erase and wp.

We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.

MX25R1635F datasheet is available at the following URL:
https://www.macronix.com/Lists/Datasheet/Attachments/8702/MX25R1635F,%20Wide...

Change-Id: I6e2b417ab177039618069d8e35132ddbfb814f03
Signed-off-by: DanielZhang 
---
M flashchips.c
1 file changed, 10 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/40/81840/1

diff --git a/flashchips.c b/flashchips.c
index 7a40f07..92691c1 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10103,8 +10103,8 @@
    	.total_size	= 2048,
    	.page_size	= 256,
    	/* OTP: 1024B total; enter 0xB1, exit 0xC1 */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
-		.tested		= TEST_OK_PREW,
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR,
+		.tested		= TEST_OK_PREWB,
    	.probe		= PROBE_SPI_RDID,
    	.probe_timing	= TIMING_ZERO,
    	.block_erasers	=
@@ -10131,6 +10131,14 @@
    	.write		= SPI_CHIP_WRITE256,
    	.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
    	.voltage	= {1650, 3600},
+		.reg_bits	=
+		{
+			.srp    = {STATUS1, 7, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW},  {STATUS1, 5, RW}},
+			.tb     = {CONFIG, 3, OTP}
+		},
+
+		.decode_range	= DECODE_RANGE_SPI25,
    },

{