Attention is currently required from: Anastasia Klimchuk, Krystian Hebel, Maciej Pijanowski, Michał Kopeć, Sergii Dmytruk.
Michał Żygowski has posted comments on this change by Maciej Pijanowski. ( https://review.coreboot.org/c/flashrom/+/83854?usp=email )
Change subject: ichspi: Add RaptorPoint PCH support ......................................................................
Patch Set 4:
(1 comment)
File util/ich_descriptors_tool/ich_descriptors_tool.c:
https://review.coreboot.org/c/flashrom/+/83854/comment/4ba31611_8a68a87e?usp... : PS3, Line 142: "\t- "600" or "alder" for Intel's 600 series chipsets.\n"
Added the missing raptor.
The result from ich_descriptors_tool is quite long. Should I really put it into commit message?
./ich_descriptors_tool -f ~/msi_ms7e06_v0.9.1_ddr5.rom -c 700 The flash image has a size of 33554432 [0x2000000] bytes. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x00040003 FLMAP1 0x73100208 FLMAP2 0x00140170
--- Details --- NR (Number of Regions): 16 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH/SoC Strap Length): 115 FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x100 NM (Number of Masters): 2 FMBA (Flash Master Base Address): 0x080 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x700
=== Component Section === FLCOMP 0x0930f0f6 FLILL 0x00000000 FLILL1 0x00000000
--- Details --- Component 1 density: 32 MB Component 2 is not used. Read Clock Frequency: 100 MHz Read ID and Status Clock Freq.: 50 MHz Write and Erase Clock Freq.: 50 MHz Fast Read is supported. Fast Read Clock Frequency: 50 MHz Dual Output Fast Read Support: disabled No forbidden opcodes.
=== Region Section === FLREG0 0x00000000 FLREG1 0x1fff1000 FLREG2 0x03d80001 FLREG3 0x00007fff FLREG4 0x00007fff FLREG5 0x00007fff FLREG6 0x00007fff FLREG7 0x00007fff FLREG8 0x00007fff FLREG9 0x0fff03d9 FLREG10 0x00007fff FLREG11 0x00007fff FLREG12 0x00007fff FLREG13 0x00007fff FLREG14 0x00007fff FLREG15 0x00007fff
--- Details --- Region 0 (Descr. ) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x01000000 - 0x01ffffff Region 2 (ME ) 0x00001000 - 0x003d8fff Region 3 (GbE ) is unused. Region 4 (Platf. ) is unused. Region 5 (DevExp ) is unused. Region 6 (BIOS2 ) is unused. Region 7 (unknown) is unused. Region 8 (EC/BMC ) is unused. Region 9 (unknown) 0x003d9000 - 0x00ffffff Region 10 (IE ) is unused. Region 11 (10GbE0 ) is unused. Region 12 (10GbE1 ) is unused. Region 13 (unknown) is unused. Region 14 (unknown) is unused. Region 15 (PTT ) is unused.
=== Master Section === FLMSTR1 0xffffff00 FLMSTR2 0xffffff00
--- Details --- FD BIOS ME GbE Pltf DE BIOS2 Reg7 EC DE2 IE 10GbE0 10GbE1 RegD RegE PTT BIOS rw rw rw rw rw rw rw rw rw rw rw rw ME rw rw rw rw rw rw rw rw rw rw rw rw
=== Upper Map Section === FLUMAP1 0xc0ff02df
--- Details --- VTL (length in DWORDS) = 2 VTBA (base address) = 0x000df0
VSCC Table: 1 entries JID0 = 0x0000471f VSCC0 = 0x20152015 Manufacturer ID 0x1f, Device ID 0x4700 BES=0x1, WG=1, WSR=0, WEWS=1, EO=0x20
=== Softstraps === --- North/MCH/PROC (1 entries) --- STRP0 = 0xffffffff
ISL (115) is greater than the current maximum of 23 entries. Only the first 23 entries will be printed. --- South/ICH/PCH (23 entries) --- STRP0 = 0x1ff00000 STRP1 = 0x1ff00000 STRP2 = 0x1ff00000 STRP3 = 0x1ff00000 STRP4 = 0x1ff00000 STRP5 = 0x1ff00000 STRP6 = 0x10000000 STRP7 = 0x00f000f0 STRP8 = 0x00f000f0 STRP9 = 0x00f000f0 STRP10 = 0x00000000 STRP11 = 0x00000001 STRP12 = 0x00000000 STRP13 = 0x00000000 STRP14 = 0x00000050 STRP15 = 0x00000010 STRP16 = 0x00000004 STRP17 = 0x00000000 STRP18 = 0x000003c0 STRP19 = 0x22222200 STRP20 = 0x22222022 STRP21 = 0x22222222 STRP22 = 0x03fc0022
The meaning of the descriptor straps are unknown yet.
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Michał Żygowski (Code Review)