Change in flashrom[master]: flashchips: add definition of the XT25F02E SPI NOR flash

[Neil Armstrong (Code Review)]

Attention is currently required from: Angel Pons.
Neil Armstrong has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/50263 )

Change subject: flashchips: add definition of the XT25F02E SPI NOR flash
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Patch Set 1:

(3 comments)

Commit Message:

https://review.coreboot.org/c/flashrom/+/50263/comment/1c511e91_6e81fe4e 
PS1, Line 9: Technology Limited.
> nit: put this part on the next line (line length limit for commit messages is 72 characters)

Ack

File flashchips.c:

https://review.coreboot.org/c/flashrom/+/50263/comment/13b5af3d_0ea69f6b 
PS1, Line 19242: TEST_UNTESTED
> It would be great to test this flash chip, if you can.

It has been tested with https://review.coreboot.org/c/flashrom/+/50264 but I have no way to test it by another mean, should I removed UNTESTED then ?

https://review.coreboot.org/c/flashrom/+/50263/comment/7097b182_a42544c6 
PS1, Line 19253: , {
               : 				.eraseblocks = { {256 * 1024, 1} },
               : 				.block_erase = spi_block_erase_c7,
               : 			}
> Missing one entry for opcode 0x60: […]

Ack