Hello Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/26947
to look at the new patch set (#3).
Change subject: bitbang_spi: Add half-duplex optimizations ......................................................................
bitbang_spi: Add half-duplex optimizations
Currently, the core of bitbang_spi is a full-duplex SPI loop but in practice this code is only ever used half-duplex. Spliting this code into two half duplex loops allows us to optimize performance by reducing communications and/or CPU pipeline stalls.
The speed up varies depending on how much the overhead of getting/setting pins dominates execution time. For a USB bit bang driver running on a 7th generation Core i5, the time to probe drops from ~7.7 seconds to ~6.7 seconds when this patch is applied.
Change-Id: I33b9f363716f651146c09113bda5fffe53b16738 Signed-off-by: Daniel Thompson daniel.thompson@linaro.org --- M bitbang_spi.c 1 file changed, 19 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/47/26947/3