Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer.
Victor Lim has posted comments on this change by Victor Lim. ( https://review.coreboot.org/c/flashrom/+/84090?usp=email )
Change subject: flashchips: add GD25F256F
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Patch Set 2:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/84090/comment/8d108056_3421be22?usp... :
PS2, Line 8056: reg_bits
The exact definition in the datasheet for STATUS1 bit 7 is "Reserved". […]
Since it is now a "reserved" bit, that means this bit is no longer meaningful. When reading it, it will give value 0.
It can still do SW protection; just no HW protection.
Below is the message when reading the --wp-status.
Found GigaDevice flash chip "GD25F256F" (32768 kB, SPI) on ch347_spi.
Protection range: start=0x01e00000 length=0x00200000 (upper 1/16)
Protection mode: disabled
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