Attention is currently required from: Nico Huber, Subrata Banik, Angel Pons. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62282 )
Change subject: ichspi: Add Jasper Lake support ......................................................................
Patch Set 10:
(1 comment)
Patchset:
PS4:
You are right `NM` is confusing, can we comment it better? Possibly copy what you just said there […]
Yes, everything has been re-tested. Here is the diff of the log:
``` localhost ~ # diff -u /tmp/log /tmp/log1 | grep -E '^(+|-)' --- /tmp/log 2022-04-07 18:37:54.765981410 -0700 +++ /tmp/log1 2022-04-07 18:55:48.066354412 -0700 -pre-rounding: start=0x00007f600ac74040, len=0x348, end=0x00007f600ac74388 -post-rounding: start=0x00007f600ac74000, len=0x1000, end=0x00007f600ac75000 +pre-rounding: start=0x00007b5026fbe040, len=0x348, end=0x00007b5026fbe388 +post-rounding: start=0x00007b5026fbe000, len=0x1000, end=0x00007b5026fbf000 -pre-rounding: start=0x00007f600aa0f000, len=0x10000, end=0x00007f600aa1f000 -post-rounding: start=0x00007f600aa0f000, len=0x10000, end=0x00007f600aa1f000 +pre-rounding: start=0x00007b5026d59000, len=0x10000, end=0x00007b5026d69000 +post-rounding: start=0x00007b5026d59000, len=0x10000, end=0x00007b5026d69000 -SPIBAR = 0x00007f600ac74000 (phys = 0xfe010000) +SPIBAR = 0x00007b5026fbe000 (phys = 0xfe010000) -NM (Number of Masters): 2 +NM (Number of Masters): 3 +FLMSTR3 0x00000000 +GbE -programmer_map_flash_region: mapping GD25Q127C/GD25Q128C from 0x00000000ff000000 to 0x00007f6009a1f000 +programmer_map_flash_region: mapping GD25Q127C/GD25Q128C from 0x00000000ff000000 to 0x00007b5025d69000 -pre-rounding: start=0x00007f6009a1f000, len=0x1000000, end=0x00007f600aa1f000 -post-rounding: start=0x00007f6009a1f000, len=0x1000000, end=0x00007f600aa1f000 -programmer_unmap_flash_region: unmapped 0x00007f6009a1f000 +pre-rounding: start=0x00007b5025d69000, len=0x1000000, end=0x00007b5026d69000 +post-rounding: start=0x00007b5025d69000, len=0x1000000, end=0x00007b5026d69000 +programmer_unmap_flash_region: unmapped 0x00007b5025d69000 -programmer_map_flash_region: mapping GD25Q127C/GD25Q128C from 0x00000000ff000000 to 0x00007f6008a1e000 +programmer_map_flash_region: mapping GD25Q127C/GD25Q128C from 0x00000000ff000000 to 0x00007b5024d68000 -pre-rounding: start=0x00007f6008a1e000, len=0x1000000, end=0x00007f6009a1e000 -post-rounding: start=0x00007f6008a1e000, len=0x1000000, end=0x00007f6009a1e000 -programmer_unmap_flash_region: unmapped 0x00007f6008a1e000 +pre-rounding: start=0x00007b5024d68000, len=0x1000000, end=0x00007b5025d68000 +post-rounding: start=0x00007b5024d68000, len=0x1000000, end=0x00007b5025d68000 +programmer_unmap_flash_region: unmapped 0x00007b5024d68000 ``` with the diff: ``` diff --git a/ich_descriptors.c b/ich_descriptors.c index 832ca949..51e5c292 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -76,7 +76,7 @@ ssize_t ich_number_of_masters(const enum ich_chipset cs, const struct ich_desc_c case CHIPSET_APOLLO_LAKE: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_GEMINI_LAKE: - case CHIPSET_JASPER_LAKE: + //case CHIPSET_JASPER_LAKE: ```
As can be observed `FLMSTR3 0x00000000` so I think `ich_number_of_masters()` is correct.
Full log here of this commit: ``` Laptop detected via DMI. DMI string system-manufacturer: "Google" DMI string system-product-name: "Magolor" DMI string system-version: "rev3" DMI string baseboard-manufacturer: "Google" DMI string baseboard-product-name: "Magolor" DMI string baseboard-version: "rev3" Found chipset "Intel Jasper Lake" with PCI ID 8086:4da4. Enabling flash write... BIOS_SPI_BC = 0x8b: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x0 (SPI) Top Swap: not enabled SPI Read Configuration: prefetching enabled, caching enabled, BIOS_CNTL = 0x8b: BIOS Lock Enable: enabled, BIOS Write Enable: enabled page_size=1000 pre-rounding: start=0x00000000fe010000, len=0x1000, end=0x00000000fe011000 post-rounding: start=0x00000000fe010000, len=0x1000, end=0x00000000fe011000 SPIBAR = 0x00007f600ac74000 (phys = 0xfe010000) 0x04: 0xe000 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=0, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 SPI Configuration is locked down. Reading OPCODES... done OP Type Pre-OP op[0]: 0x01, write w/o addr, none op[1]: 0x02, write w/ addr, none op[2]: 0x03, read w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x20, write w/ addr, none op[5]: 0x9f, read w/o addr, none op[6]: 0xd8, write w/ addr, none op[7]: 0x0b, read w/ addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x50 0x06: 0x3f00 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 0x08: 0x00000fc0 (FADDR) 0x0c: 0x00001f00 (DLOCK) DLOCK: BMWAG_LOCKDN=0, BMRAG_LOCKDN=0, SBMWAG_LOCKDN=0, SBMRAG_LOCKDN=0, PR0_LOCKDN=1, PR1_LOCKDN=1, PR2_LOCKDN=1, PR3_LOCKDN=1, PR4_LOCKDN=1, SSEQ_LOCKDN=0 0x50: 0x000042c7 (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x42, BRRA 0xc7 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x0fff0381 FREG1: BIOS region (0x00381000-0x00ffffff) is read-write. 0x5C: 0x03800001 FREG2: Management Engine region (0x00001000-0x00380fff) is read-only. 0x60: 0x00007fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00007fff FREG4: Platform Data region is unused. 0x68: 0x00007fff FREG5: Device Expansion region is unused. 0x6C: 0x00007fff FREG6: BIOS2 region is unused. 0x70: 0x00007fff FREG7: unknown region is unused. Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. 0x74: 0x3f00e000 FREG8: EC/BMC region is unused. 0x78: 0x00007fff FREG9: unknown region is unused. 0x7C: 0x00007fff FREG10: unknown region is unused. 0x80: 0x00007fff FREG11: unknown region is unused. 0xE0: 0x00007fff FREG12: unknown region is unused. 0xE4: 0x00007fff FREG13: unknown region is unused. 0xE8: 0x00007fff FREG14: unknown region is unused. 0xEC: 0x00007fff FREG15: unknown region is unused. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. 0x84: 0x00000000 (PR0 is unused) 0x88: 0x00000000 (PR1 is unused) 0x8C: 0x00000000 (PR2 is unused) 0x90: 0x00000000 (PR3 is unused) 0x94: 0x00000000 (PR4 is unused) 0x98: 0x80f50001 0xa0: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0xa1: 0xfe0000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=6 0xa4: 0x5006 (PREOP) 0xa6: 0xb32d (OPTYPE) 0xa8: 0x05030201 (OPMENU) 0xac: 0x0bd89f20 (OPMENU+4) 0xc4: 0xf3d82004 (LVSCC) LVSCC: BES=0x0, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xc8: 0x00002000 (UVSCC) UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x20 Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x00040003 FLMAP1 0x2a100208 FLMAP2 0x000301b0
--- Details --- NR (Number of Regions): 16 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH/SoC Strap Length): 42 FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x100 NM (Number of Masters): 2 FMBA (Flash Master Base Address): 0x080 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0xb00
=== Component Section === FLCOMP 0x12583cf5 FLILL 0xad604221 FLILL1 0xc7c4b9b7
--- Details --- Component 1 density: 16 MB Component 2 is not used. Read Clock Frequency: 30 MHz Read ID and Status Clock Freq.: 48 MHz Write and Erase Clock Freq.: 48 MHz Fast Read is supported. Fast Read Clock Frequency: 48 MHz Dual Output Fast Read Support: disabled Invalid instruction 0: 0x21 Invalid instruction 1: 0x42 Invalid instruction 2: 0x60 Invalid instruction 3: 0xad Invalid instruction 4: 0xb7 Invalid instruction 5: 0xb9 Invalid instruction 6: 0xc4 Invalid instruction 7: 0xc7
=== Region Section === FLREG0 0x00000000 FLREG1 0x0fff0381 FLREG2 0x03800001 FLREG3 0x00007fff FLREG4 0x00007fff FLREG5 0x00007fff FLREG6 0x00007fff FLREG7 0x00007fff FLREG8 0x00007fff FLREG9 0x00007fff FLREG10 0x00007fff FLREG11 0x00007fff FLREG12 0x00007fff FLREG13 0x00007fff FLREG14 0x00007fff FLREG15 0x00007fff
--- Details --- Region 0 (Descr. ) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00381000 - 0x00ffffff Region 2 (ME ) 0x00001000 - 0x00380fff Region 3 (GbE ) is unused. Region 4 (Platf. ) is unused. Region 5 (DevExp ) is unused. Region 6 (BIOS2 ) is unused. Region 7 (unknown) is unused. Region 8 (EC/BMC ) is unused. Region 9 (unknown) is unused. Region 10 (IE ) is unused. Region 11 (10GbE ) is unused. Region 12 (unknown) is unused. Region 13 (unknown) is unused. Region 14 (unknown) is unused. Region 15 (unknown) is unused.
=== Master Section === FLMSTR1 0x00200700 FLMSTR2 0x00400500
--- Details --- FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9 RegA RegB RegC RegD RegE RegF BIOS r rw r ME r rw
checking for opcode 0x03 checking for opcode 0x05 Enabling hardware sequencing by default for 100+ series PCH. OK. No board enable found matching coreboot IDs vendor="Google", model="Magolor". The following protocols are supported: Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Chip identified: GD25Q127C/GD25Q128C Hardware sequencing reports 1 attached SPI flash chip with a density of 16384 kB. There is only one partition containing the whole address space (0x000000 - 0xffffff). There are 4096 erase blocks with 4096 B each. Added layout entry 00000000 - 00ffffff named complete flash Found GigaDevice flash chip "GD25Q127C/GD25Q128C" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Found GigaDevice flash chip "GD25Q127C/GD25Q128C" (16384 kB, Programmer-specific). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). page_size=1000 pre-rounding: start=0x00000000ff000000, len=0x1000000, end=0x0000000100000000 post-rounding: start=0x00000000ff000000, len=0x1000000, end=0x0000000100000000 programmer_map_flash_region: mapping GD25Q127C/GD25Q128C from 0x00000000ff000000 to 0x00007f6009a1f000 Reading Status register Block protection is disabled. Reading ich descriptor... Reading 4096 bytes starting at 0x000000. done. Assuming chipset 'Gemini Lake'. Added layout entry 00000000 - 00000fff named fd Added layout entry 00381000 - 00ffffff named bios Added layout entry 00001000 - 00380fff named me page_size=1000 pre-rounding: start=0x00007f6009a1f000, len=0x1000000, end=0x00007f600aa1f000 post-rounding: start=0x00007f6009a1f000, len=0x1000000, end=0x00007f600aa1f000 programmer_unmap_flash_region: unmapped 0x00007f6009a1f000 restore_power_management: Re-enabling power management. Looking for region "bios"... found. Looking for region "fd"... found. Using regions: "bios", "fd". page_size=1000 pre-rounding: start=0x00000000ff000000, len=0x1000000, end=0x0000000100000000 post-rounding: start=0x00000000ff000000, len=0x1000000, end=0x0000000100000000 programmer_map_flash_region: mapping GD25Q127C/GD25Q128C from 0x00000000ff000000 to 0x00007f6008a1e000 Reading Status register Block protection is disabled. Reading flash... 0x381000-0xffffff:R Reading 13103104 bytes starting at 0x381000. 000000-0x0fff:R Reading 4096 bytes starting at 0x000000. done. page_size=1000 pre-rounding: start=0x00007f6008a1e000, len=0x1000000, end=0x00007f6009a1e000 post-rounding: start=0x00007f6008a1e000, len=0x1000000, end=0x00007f6009a1e000 programmer_unmap_flash_region: unmapped 0x00007f6008a1e000 restore_power_management: Re-enabling power management. SUCCESS Restoring PCI config space for 00:1f:5 reg 0xdc ```
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Edward O'Callaghan (Code Review)