Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/54169 )
Change subject: programmer: Smoothen register_par_master API ......................................................................
programmer: Smoothen register_par_master API
It was impossible to register a const struct par_master that would point to dynamically allocated `data`. Fix that so that we won't have to create more mutable globals.
BUG=b:185191942 TEST=builds
Change-Id: I95bc92f6c54c5bcdac1c522ca87054aaffed0f40 Signed-off-by: Anastasia Klimchuk aklm@chromium.org Reviewed-on: https://review.coreboot.org/c/flashrom/+/54169 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Edward O'Callaghan quasisec@chromium.org --- M atahpt.c M atapromise.c M atavia.c M drkaiser.c M dummyflasher.c M gfxnvidia.c M internal.c M it8212.c M nic3com.c M nicintel.c M nicnatsemi.c M nicrealtek.c M programmer.c M programmer.h M satamv.c M satasii.c M serprog.c 17 files changed, 21 insertions(+), 17 deletions(-)
Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved
diff --git a/atahpt.c b/atahpt.c index dae0222..620e894 100644 --- a/atahpt.c +++ b/atahpt.c @@ -75,7 +75,7 @@ reg32 |= (1 << 24); rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
- register_par_master(&par_master_atahpt, BUS_PARALLEL); + register_par_master(&par_master_atahpt, BUS_PARALLEL, NULL);
return 0; } diff --git a/atapromise.c b/atapromise.c index ab34a1e..f32bdb4 100644 --- a/atapromise.c +++ b/atapromise.c @@ -140,7 +140,7 @@ }
max_rom_decode.parallel = rom_size; - register_par_master(&par_master_atapromise, BUS_PARALLEL); + register_par_master(&par_master_atapromise, BUS_PARALLEL, NULL);
msg_pwarn("Do not use this device as a generic programmer. It will leave anything outside\n" "the first %zu kB of the flash chip in an undefined state. It works fine for the\n" diff --git a/atavia.c b/atavia.c index b407a30..e04950a 100644 --- a/atavia.c +++ b/atavia.c @@ -160,7 +160,7 @@ return 1; }
- register_par_master(&lpc_master_atavia, BUS_LPC); + register_par_master(&lpc_master_atavia, BUS_LPC, NULL);
return 0; } diff --git a/drkaiser.c b/drkaiser.c index ac49df3..fa562b4 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -77,7 +77,7 @@ return 1;
max_rom_decode.parallel = 128 * 1024; - register_par_master(&par_master_drkaiser, BUS_PARALLEL); + register_par_master(&par_master_drkaiser, BUS_PARALLEL, NULL);
return 0; } diff --git a/dummyflasher.c b/dummyflasher.c index e19e46c..c1c393c 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -1027,7 +1027,8 @@ } if (dummy_buses_supported & BUS_NONSPI) register_par_master(&par_master_dummy, - dummy_buses_supported & BUS_NONSPI); + dummy_buses_supported & BUS_NONSPI, + NULL); if (dummy_buses_supported & BUS_SPI) register_spi_master(&spi_master_dummyflasher, data);
diff --git a/gfxnvidia.c b/gfxnvidia.c index d8ea4d6..fe6f982 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -103,7 +103,7 @@
/* Write/erase doesn't work. */ programmer_may_write = 0; - register_par_master(&par_master_gfxnvidia, BUS_PARALLEL); + register_par_master(&par_master_gfxnvidia, BUS_PARALLEL, NULL);
return 0; } diff --git a/internal.c b/internal.c index bdbe32d..bb32435 100644 --- a/internal.c +++ b/internal.c @@ -335,7 +335,7 @@ #endif /* IS_X86 */
if (internal_buses_supported & BUS_NONSPI) - register_par_master(&par_master_internal, internal_buses_supported); + register_par_master(&par_master_internal, internal_buses_supported, NULL);
/* Report if a non-whitelisted laptop is detected that likely uses a legacy bus. */ if (is_laptop && !laptop_ok) { diff --git a/it8212.c b/it8212.c index ac53a6f..2f2d43e 100644 --- a/it8212.c +++ b/it8212.c @@ -67,7 +67,7 @@ rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
max_rom_decode.parallel = IT8212_MEMMAP_SIZE; - register_par_master(&par_master_it8212, BUS_PARALLEL); + register_par_master(&par_master_it8212, BUS_PARALLEL, NULL); return 0; }
diff --git a/nic3com.c b/nic3com.c index b7b967a..6ff91e7 100644 --- a/nic3com.c +++ b/nic3com.c @@ -120,7 +120,7 @@ return 1;
max_rom_decode.parallel = 128 * 1024; - register_par_master(&par_master_nic3com, BUS_PARALLEL); + register_par_master(&par_master_nic3com, BUS_PARALLEL, NULL);
return 0; } diff --git a/nicintel.c b/nicintel.c index 4672890..afd2682 100644 --- a/nicintel.c +++ b/nicintel.c @@ -99,7 +99,7 @@ pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR);
max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE; - register_par_master(&par_master_nicintel, BUS_PARALLEL); + register_par_master(&par_master_nicintel, BUS_PARALLEL, NULL);
return 0; } diff --git a/nicnatsemi.c b/nicnatsemi.c index 085768d..77b5440 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -71,7 +71,7 @@ * functions below wants to be 0x0000FFFF. */ max_rom_decode.parallel = 131072; - register_par_master(&par_master_nicnatsemi, BUS_PARALLEL); + register_par_master(&par_master_nicnatsemi, BUS_PARALLEL, NULL);
return 0; } diff --git a/nicrealtek.c b/nicrealtek.c index 5454b63..2208179 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -86,7 +86,7 @@ if (register_shutdown(nicrealtek_shutdown, NULL)) return 1;
- register_par_master(&par_master_nicrealtek, BUS_PARALLEL); + register_par_master(&par_master_nicrealtek, BUS_PARALLEL, NULL);
return 0; } diff --git a/programmer.c b/programmer.c index 42ea2e3..c276a69 100644 --- a/programmer.c +++ b/programmer.c @@ -81,7 +81,8 @@ }
int register_par_master(const struct par_master *mst, - const enum chipbustype buses) + const enum chipbustype buses, + void *data) { struct registered_master rmst = {0};
@@ -96,6 +97,8 @@
rmst.buses_supported = buses; rmst.par = *mst; + if (data) + rmst.par.data = data; return register_master(&rmst); }
diff --git a/programmer.h b/programmer.h index 1a2e758..ac6b058 100644 --- a/programmer.h +++ b/programmer.h @@ -747,7 +747,7 @@ void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); void *data; }; -int register_par_master(const struct par_master *mst, const enum chipbustype buses); +int register_par_master(const struct par_master *mst, const enum chipbustype buses, void *data); struct registered_master { enum chipbustype buses_supported; struct { diff --git a/satamv.c b/satamv.c index 31265ea..2640b78 100644 --- a/satamv.c +++ b/satamv.c @@ -148,7 +148,7 @@ /* 512 kByte with two 8-bit latches, and * 4 MByte with additional 3-bit latch. */ max_rom_decode.parallel = 4 * 1024 * 1024; - register_par_master(&par_master_satamv, BUS_PARALLEL); + register_par_master(&par_master_satamv, BUS_PARALLEL, NULL);
return 0; } diff --git a/satasii.c b/satasii.c index 8a0938d..c9dfdad 100644 --- a/satasii.c +++ b/satasii.c @@ -100,7 +100,7 @@ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pwarn("Warning: Flash seems unconnected.\n");
- register_par_master(&par_master_satasii, BUS_PARALLEL); + register_par_master(&par_master_satasii, BUS_PARALLEL, NULL);
return 0; } diff --git a/serprog.c b/serprog.c index 056d8d1..e6028aa 100644 --- a/serprog.c +++ b/serprog.c @@ -885,7 +885,7 @@ if (serprog_buses_supported & BUS_SPI) register_spi_master(&spi_master_serprog, NULL); if (serprog_buses_supported & BUS_NONSPI) - register_par_master(&par_master_serprog, serprog_buses_supported & BUS_NONSPI); + register_par_master(&par_master_serprog, serprog_buses_supported & BUS_NONSPI, NULL); return 0; }
-
Edward O'Callaghan (Code Review)