[XS] Change in flashrom[main]: ichspi: Change the opcode position for reprogramming on the fly 2->4

[Anastasia Klimchuk (Code Review)]

Attention is currently required from: Bill XIE, Nikolai Artemiev.

Hello Bill XIE, Nikolai Artemiev, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/flashrom/+/84567?usp=email

to look at the new patch set (#2).

Change subject: ichspi: Change the opcode position for reprogramming on the fly 2->4
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ichspi: Change the opcode position for reprogramming on the fly 2->4

The function for reprogramming on the fly was using the default
configuration O_ST_M25P as a base and the position 2 as the position
to reprogram. Position 2 corresponds to JEDEC_SE which is often useful
for chip erase (when less than whole chip needs to be erased).

This patch changes the default position to reprogram to 4, which
corresponds to JEDEC_REMS. It is used less often, but if it needs to
be used, it will be discovered missing and reprogrammed back.

For erase opcodes, there is usually several of them available. So if
one is missing, erase still can be performed with the remaining ones.
However, this hides the fact that one of available erase opcodes is
missing (it won't be reprogrammed back), and also it gives non-optimal
erase layout.

Context: https://ticket.coreboot.org/issues/556

Change-Id: I6bc855daedf0af2e8de191f23a3512de3ebc3fef
Signed-off-by: Anastasia Klimchuk 
---
M ichspi.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/67/84567/2