[S] Change in flashrom[main]: [Test] Add GD25LQ255E write protect

[Tyler Wang (Code Review)]

Tyler Wang has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/79460?usp=email )

Change subject: [Test] Add GD25LQ255E write protect
......................................................................

[Test] Add GD25LQ255E write protect

BUG=b:311336475
TEST=none

Change-Id: I1425e931433c00caceaabc6037a79099d6d5eac5
Signed-off-by: Tyler Wang 
---
M flashchips.c
1 file changed, 11 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/79460/1

diff --git a/flashchips.c b/flashchips.c
index 7c70d48..60e33b7 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6556,7 +6556,7 @@
    	.total_size	= 32768,
    	.page_size	= 256,
    	/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_4BA,
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_4BA | FEATURE_WRSR2,
    	.tested		= TEST_OK_PREW,
    	.probe		= PROBE_SPI_RDID,
    	.probe_timing	= TIMING_ZERO,
@@ -6593,6 +6593,16 @@
    	.write		= SPI_CHIP_WRITE256,
    	.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
    	.voltage	= {1695, 1950},
+		.reg_bits	=
+		{
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}, {STATUS1, 6, RW}},
+			.tb     = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+			.sec    = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.decode_range	= DECODE_RANGE_SPI25,
    },

{