Attention is currently required from: Subrata Banik, Angel Pons, Nikolai Artemiev.
Hello build bot (Jenkins), Subrata Banik, Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69129
to look at the new patch set (#15).
Change subject: writeprotect,ichspi,spi25: handle register access constraints ......................................................................
writeprotect,ichspi,spi25: handle register access constraints
Make the spi25 register read/write functions return SPI_INVALID_OPCODE if the programmer blocks the read/write opcode for the register.
Likewise, make ichspi read/write register functions return SPI_INVALID_OPCODE for registers >SR1 as they cannot be accessd.
Make writeprotect ignore SPI_INVALID_OPCODE unless it is trying to read/write SR1, which should always be supported.
BUG=b:253715389,b:253713774,b:240229722 BRANCH=none TEST=flashrom --wp-{enable,disable,range,list,status} on dedede
Change-Id: I2145749dcc51f4556550650dab5aa1049f879c45 Signed-off-by: Nikolai Artemiev nartemiev@google.com --- M ichspi.c M spi25_statusreg.c M writeprotect.c 3 files changed, 71 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/69129/15