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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59709
to look at the new patch set (#4).
Change subject: [RFC][OTP] spi25_statusreg: support reading/writing security register ......................................................................
[RFC][OTP] spi25_statusreg: support reading/writing security register
Not to be confused with "secure registers" of OTP.
Security register is a dedicated status register for security-related bits. You don't write its value directly, issuing corresponding write command with no data just sets OTP bit to 1 automatically.
No WREN is necessary, but at least some datasheets indicate BUSY state after write command.
Unlike cases where OTP bit is part of SR and can only be written while in OTP mode, security register can only be written outside of the mode.
Change-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae Signed-off-by: Sergii Dmytruk sergii.dmytruk@3mdeb.com --- M flash.h M spi.h M spi25_statusreg.c 3 files changed, 58 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/09/59709/4