Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/66661 )
Change subject: ichspi.c: Allow passing programmer_cfg directly ......................................................................
ichspi.c: Allow passing programmer_cfg directly
Modify the type signature of the programmer entry-point xxx_init() functions to allow for the consumption of the programmer parameterisation string data. Also plumb programmer_cfg though get_params.
Change-Id: I480589bb50b47fdf5af259d068f49fedfce88ea5 Signed-off-by: Edward O'Callaghan quasisec@google.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/66661 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Anastasia Klimchuk aklm@chromium.org Reviewed-by: Felix Singer felixsinger@posteo.net --- M chipset_enable.c M ichspi.c M include/programmer.h 3 files changed, 29 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c index 3d7c49f..64af483 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -816,7 +816,7 @@ void *spibar = rcrb + spibar_offset;
/* This adds BUS_SPI */ - int ret_spi = ich_init_spi(spibar, ich_generation); + int ret_spi = ich_init_spi(NULL, spibar, ich_generation); /* TODO(quasisec): pass prog_param */ if (ret_spi == ERROR_FATAL) return ret_spi;
@@ -960,7 +960,7 @@ msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08x)\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar);
/* This adds BUS_SPI */ - const int ret_spi = ich_init_spi(spibar, pch_generation); + const int ret_spi = ich_init_spi(NULL, spibar, pch_generation); /* TODO(quasisec): pass prog_param */ if (ret_spi != ERROR_FATAL) { if (ret_bc || ret_spi) ret = ERROR_NONFATAL; @@ -1077,7 +1077,7 @@ */ enable_flash_ich_bios_cntl_memmapped(ich_generation, spibar + 0xFC);
- int ret_spi = ich_init_spi(spibar, ich_generation); + int ret_spi = ich_init_spi(NULL, spibar, ich_generation); /* TODO(quasisec): pass prog_param */ if (ret_spi == ERROR_FATAL) return ret_spi;
diff --git a/ichspi.c b/ichspi.c index 78c446f..855b7fb 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1872,9 +1872,9 @@ ich_swseq };
-static int get_ich_spi_mode_param(enum ich_spi_mode *ich_spi_mode) +static int get_ich_spi_mode_param(const struct programmer_cfg *cfg, enum ich_spi_mode *ich_spi_mode) { - char *const arg = extract_programmer_param_str(NULL, "ich_spi_mode"); + char *const arg = extract_programmer_param_str(cfg, "ich_spi_mode"); if (!arg) { return 0; } else if (!strcmp(arg, "hwseq")) { @@ -1964,7 +1964,7 @@ } }
-static int init_ich_default(void *spibar, enum ich_chipset ich_gen) +static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen) { unsigned int i; uint16_t tmp2; @@ -1977,7 +1977,7 @@
init_chipset_properties(&swseq_data, &g_hwseq_data, &num_freg, &num_pr, ®_pr0, ich_gen);
- int ret = get_ich_spi_mode_param(&ich_spi_mode); + int ret = get_ich_spi_mode_param(cfg, &ich_spi_mode); if (ret) return ret;
@@ -2212,7 +2212,7 @@ return 0; }
-int ich_init_spi(void *spibar, enum ich_chipset ich_gen) +int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen) { ich_generation = ich_gen; ich_spibar = spibar; @@ -2224,7 +2224,7 @@ return init_ich7_spi(spibar, ich_gen); case CHIPSET_ICH8: default: /* Future version might behave the same */ - return init_ich_default(spibar, ich_gen); + return init_ich_default(cfg, spibar, ich_gen); } }
diff --git a/include/programmer.h b/include/programmer.h index 9aba60f..2a4b118 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -362,7 +362,7 @@
/* ichspi.c */ #if CONFIG_INTERNAL == 1 -int ich_init_spi(void *spibar, enum ich_chipset ich_generation); +int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_generation); int via_init_spi(uint32_t mmio_base);
/* amd_imc.c */