[S] Change in flashrom[main]: flashchips: redo add GD25B256E and GD25R256E

[Victor Lim (Code Review)]

Victor Lim has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/84082?usp=email )

Change subject: flashchips: redo add GD25B256E and GD25R256E
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flashchips: redo add GD25B256E and GD25R256E

Redo this commit because the previous commit did not trigger Jenkins

removed FEATURE_WRSR_EXT2 from the model after datasheet review.
replace
printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD,
.unlock		= SPI_DISABLE_BLOCKPROTECT,

with

.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
.unlock		= SPI_DISABLE_BLOCKPROTECT_BP4_SRWD,

GD25B256E: 3V 256Mbit, Quad enabled.
GD25R256E: GD25B256E features + RPMC, so they share the same datasheet on flash side
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00...

Tested both models on ch347 with erase, write, read and protection.

Change-Id: I1596628211d508d3057893c049f1a1c95a123073
Signed-off-by: Victor Lim 
---
M flashchips.c
1 file changed, 5 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/82/84082/1

diff --git a/flashchips.c b/flashchips.c
index a498ded..5ca02c7 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7451,14 +7451,14 @@

{
    	.vendor		= "GigaDevice",
-		.name		= "GD25Q256D/GD25Q256E",
+		.name		= "GD25Q256E/GD25B256E/GD25R256E/GD25Q256D",
    	.bustype	= BUS_SPI,
    	.manufacture_id	= GIGADEVICE_ID,
    	.model_id	= GIGADEVICE_GD25Q256D,
    	.total_size	= 32768,
    	.page_size	= 256,
    	.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA |
-				  FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3,
+				FEATURE_WRSR2 | FEATURE_WRSR3,
    	.tested		= TEST_OK_PREWB,
    	.probe		= PROBE_SPI_RDID,
    	.probe_timing	= TIMING_ZERO,
@@ -7490,8 +7490,8 @@
    			.block_erase = SPI_BLOCK_ERASE_C7,
    		}
    	},
-		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD,
-		.unlock		= SPI_DISABLE_BLOCKPROTECT,
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */
    	.write		= SPI_CHIP_WRITE256,
    	.read		= SPI_CHIP_READ,
    	.voltage	= {2700, 3600},
@@ -7500,7 +7500,7 @@
    		.srp    = {STATUS1, 7, RW},
    		.srl    = {STATUS2, 6, RW},
    		.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
-			.tb     = {STATUS1, 6, RW},
+			.tb     = {STATUS1, 6, RW},	/* Called BP4 in datasheet, acts like TB */
    	},
    	.decode_range	= DECODE_RANGE_SPI25,
    },