Change in flashrom[staging]: ichspi: Add support for Intel Skylake

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/18962 )

Change subject: ichspi: Add support for Intel Skylake
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/18962/1/ichspi.c
File ichspi.c:

PS1, Line 947: 	/* Program offset in flash into FADDR while preserve the reserved bits
             : 	 * and clearing the 25. address bit which is only useable in hwseq. */
             : 	temp32 = REGREAD32(ICH9_REG_FADDR) & ~0x01FFFFFF;
             : 	REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32);
Probably needs an update.