Attention is currently required from: Felix Singer, Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Nikolai Artemiev. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62768 )
Change subject: flashrom.8.tmpl: Add raiden_debug_spi doc entry ......................................................................
Patch Set 2:
(1 comment)
File flashrom.8.tmpl:
https://review.coreboot.org/c/flashrom/+/62768/comment/d5a297b2_90e705a9 PS2, Line 1168: custom_rst=false : is the default from 1-3ms. This still seems a little confusing. What determines if it's 1ms vs 3ms. What does true mean? 10ms?
The "up to 10ms" just leaves me wondering. Is flashrom polling a status register for this amount of time to see if it's ready, then it times out at 3ms for false and 10ms for true?
Does a bool even really make sense here? Why not allow the user to just specify a time?
If I've got it correct about the polling and timeout, maybe say something like:
Allow time for power to settle on the AP and EC flash devices. Flashrom will poll, waiting for the system to be ready. You can use the optional .B custom_rst=true parameter to change the timeout value from 3ms to 10ms. .sp .B " flashrom -p raiden_debug_spi:custom_rst=<true|false>" .sp syntax, where .B custom_rst=false is the default timeout of 3ms.
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Martin Roth (Code Review)