Attention is currently required from: Sam McNally, Edward O'Callaghan.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/71576 )
Change subject: chipset_enable.c: Add TL UP3 and UP4/Y id's
......................................................................
Patch Set 1: Code-Review+1
(3 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/71576/comment/1cbfabc0_2d247888
PS1, Line 7: TL
TGL
https://review.coreboot.org/c/flashrom/+/71576/comment/2ebab355_0be9f9ad
PS1, Line 9: As listed in coreboot source under src/include/device/pci_ids.h
There's several other IDs, but they aren't documented.
https://review.coreboot.org/c/flashrom/+/71576/comment/05b4d411_3ba476dd
PS1, Line 13: TLK
TGL
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