[XS] Change in flashrom[main]: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry

[Hsuan-ting Chen (Code Review)]

Hsuan-ting Chen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/78505?usp=email )

Change subject: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry
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flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry

Datasheet for Q128E: https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00...

Q128E and Q127C/Q128C have compatible main functions, their differences
are:

* Q128E uses 55 nm process, while Q127C/Q128C use 65nm
* Q128E does not support QPI
* Q128E have OTP: 3072B, while Q127C/Q128C are 1536B
* Q128E's fast read clock frequency is 133MHz, while Q127C/Q128C are
  104MHZ

We also tested that Q128E could pass flashrom_tester while probing it as
127C/128C, so the main functionalities are compatible.

Change the chip name from GD25Q127C/GD25Q128C to
GD25Q127C/GD25Q128C/GD25Q128E to make it more accurate.

Chip revision history:
- The 'GD25Q127C/GD25Q128C' definition was added in
  `commit e0c7abf219b81ad049d09a4671ebc9196153d308` as 'GD25Q128C' and
  later renamed to 'GD25Q127C/GD25Q128C'

BUG=b:304863141, b:293545382
BRANCH=none
TEST=flashrom_tester with flashrom binary could pass with Q128E,
     which contains probe, read, write, erase, and write protect

Signed-off-by: Hsuan Ting Chen 
Change-Id: I5ab797bfa8f08e54cb29ed2d82eeef6604ac944d
---
M flashchips.c
M include/flashchips.h
2 files changed, 3 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/78505/1

diff --git a/flashchips.c b/flashchips.c
index e156ffb..3b73ba9 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6792,13 +6792,14 @@

{
    	.vendor		= "GigaDevice",
-		.name		= "GD25Q127C/GD25Q128C",
+		.name		= "GD25Q127C/GD25Q128C/GD25Q128E",
    	.bustype	= BUS_SPI,
    	.manufacture_id	= GIGADEVICE_ID,
    	.model_id	= GIGADEVICE_GD25Q128,
    	.total_size	= 16384,
    	.page_size	= 256,
    	/* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */
+		/* FIXME: 128E's OTP: 3072B total and doesn't support QPI */
    	/* QPI: enable 0x38, disable 0xFF */
    	.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2,
    	.tested		= TEST_OK_PREWB,
diff --git a/include/flashchips.h b/include/flashchips.h
index 962e65e..fa518c1 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -390,7 +390,7 @@
 #define GIGADEVICE_GD25Q16	0x4015	/* Same as GD25Q16B (which has OTP) */
 #define GIGADEVICE_GD25Q32	0x4016	/* Same as GD25Q32B */
 #define GIGADEVICE_GD25Q64	0x4017	/* Same as GD25Q64B */
-#define GIGADEVICE_GD25Q128	0x4018	/* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */
+#define GIGADEVICE_GD25Q128	0x4018	/* Same as GD25Q128B, GD25Q127C, GD25Q128C, and GD25Q128E, can be distinguished by SFDP */
 #define GIGADEVICE_GD25Q256D	0x4019
 #define GIGADEVICE_GD25VQ21B	0x4212
 #define GIGADEVICE_GD25VQ41B	0x4213  /* Same as GD25VQ40C, can be distinguished by SFDP */