Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/62894 )
Change subject: ichspi: Rename HSFC_FDBC -> HSFC_FDBC_MASK ......................................................................
ichspi: Rename HSFC_FDBC -> HSFC_FDBC_MASK
HSFC_FDBC_MASK macro represents the number of bytes to shift in or out during the data portion of the SPI cycle.
BUG=b:223630977 TEST=Able to perform read/write/erase operation on brya.
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: Ia0ae9a586b5c12f0229334898426175ec246a70c --- M ichspi.c 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/94/62894/1
diff --git a/ichspi.c b/ichspi.c index 3f7083c..4f4c2b2 100644 --- a/ichspi.c +++ b/ichspi.c @@ -144,7 +144,7 @@ #define HSFC_WET (0x1 << HSFC_WET_OFF) /* 3-7: reserved */ #define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ -#define HSFC_FDBC (0x3f << HSFC_FDBC_OFF) +#define HSFC_FDBC_MASK (0x3f << HSFC_FDBC_OFF) /* 14: reserved */ #define HSFC_SME_OFF 15 /* 15: SPI SMI# Enable */ #define HSFC_SME (0x1 << HSFC_SME_OFF) @@ -505,7 +505,7 @@ reg_val, ", "); break; } - pprint_reg(HSFC, FDBC, reg_val, ", "); + pprint_reg(HSFC, HSFC_FDBC_MASK, reg_val, ", "); pprint_reg(HSFC, SME, reg_val, "\n"); }
@@ -1484,7 +1484,7 @@
hsfc = REGREAD16(ICH9_REG_HSFC); hsfc &= ~hwseq_data.hsfc_fcycle; /* set read operation */ - hsfc &= ~HSFC_FDBC; /* clear byte count */ + hsfc &= ~HSFC_FDBC_MASK; /* clear byte count */ /* set byte count */ hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); hsfc |= HSFC_FGO; /* start */ @@ -1531,7 +1531,7 @@ hsfc = REGREAD16(ICH9_REG_HSFC); hsfc &= ~hwseq_data.hsfc_fcycle; /* clear operation */ hsfc |= (0x2 << HSFC_FCYCLE_OFF); /* set write operation */ - hsfc &= ~HSFC_FDBC; /* clear byte count */ + hsfc &= ~HSFC_FDBC_MASK; /* clear byte count */ /* set byte count */ hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); hsfc |= HSFC_FGO; /* start */