Change in flashrom[master]: [RFC][OTP] otp: support 2-bit locks

[Sergii Dmytruk (Code Review)]

Sergii Dmytruk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/59711 )

Change subject: [RFC][OTP] otp: support 2-bit locks
......................................................................

[RFC][OTP] otp: support 2-bit locks

Change-Id: I0593724901a0e354f1016405577f60ac82d4b14c
Signed-off-by: Sergii Dmytruk 
---
M otp.c
M otp.h
2 files changed, 24 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/11/59711/1

diff --git a/otp.c b/otp.c
index f340244..1db5639 100644
--- a/otp.c
+++ b/otp.c
@@ -33,11 +33,6 @@
  *       GD25Q80(B), GD25Q128B
  */

-/*
- * TODO: some chips have a separate Security Register which must be modified
- *       with special opcodes (see Adesto AT25SF641 chip for example).
- */
-
 static bool bp_is_stashed;
 static uint8_t stashed_bp_value;

@@ -244,12 +239,26 @@
    	return 1;
    }

-	uint8_t status;
    int result = 0;
-	if (read_reg_bit(flash, otp->regions[region].user_lock, &status)) {
-		msg_cerr("Error: Failed to query status of OTP region %d.\n",
-			 region + 1);
+	*locked = false;
+
+	uint8_t user_bit = 0;
+	if (read_reg_bit(flash, otp->regions[region].user_lock, &user_bit)) {
+		msg_cerr("Error: Failed to query user lock of OTP region %d.\n", region + 1);
    	result = 1;
+	} else {
+		*locked = user_bit;
+	}
+
+	const struct reg_bit_info factory_lock = otp->regions[region].factory_lock;
+	if (!*locked && factory_lock.reg != INVALID_REG) {
+		uint8_t factory_bit = 0;
+		if (read_reg_bit(flash, factory_lock, &factory_bit)) {
+			msg_cerr("Error: Failed to query factory lock of OTP region %d.\n", region + 1);
+			result = 1;
+		} else {
+			*locked = factory_bit;
+		}
    }

if (exit_otp_mode(flash)) {
@@ -257,7 +266,6 @@
    	return 1;
    }

-	*locked = status;
    return result;
 }

diff --git a/otp.h b/otp.h
index 9a1a53b..80a1e31 100644
--- a/otp.h
+++ b/otp.h
@@ -54,12 +54,17 @@
    	uint32_t size; /* in bytes */

/*
+		 * Lock-down bits. Setting at least one of them makes OTP
+		 * regions read-only. Once set, they can't be unset.
+		 *
    	 * All chips have at least user lock bit, which is mandatory for
    	 * OTP configuration to count as valid. User bit might actually
    	 * be set by a manufacturer after writing ESN. Some chips have
-		 * a designated factory lock-down bit instead.
+		 * a designated factory lock-down bit instead and defining it here is
+		 * optional.
    	 */
    	struct reg_bit_info user_lock;
+		struct reg_bit_info factory_lock;
    } regions[FLASHROM_OTP_MAX_REGIONS + 1]; /* We need one more than maximum */
 };