Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/70026 )
Change subject: internal.c: laptop_ok global state can become stale ......................................................................
internal.c: laptop_ok global state can become stale
Craask and similar DUT's are erroneously probing random second chips.
``` Found chipset "Intel Alder Lake-N". Enabling flash write... SPI Configuration is locked down. FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. FREG1: BIOS region (0x003a0000-0x00ffffff) is read-write. FREG2: Management Engine region (0x00001000-0x0039ffff) is read-write. OK. Found Winbond flash chip "W25Q128.V..M" (16384 kB, Programmer-specific) on host. Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed. New value is 0x8b. Found MoselVitelic flash chip "V29C51000T" (64 kB, Parallel) mapped at physical address 0x00000000ffff0000. ```
This seems to be due to `laptop_ok` becoming a stale global state after the first operation leading to probing on unrelated buses.
Therefore unconditionally reset the global state upon entry into the internal driver.
BUG=b:260518132,b:260518132 TEST=Craask reportly no longer finds duplicate chip.
Change-Id: I2c00c351904307eeb1488c5dfaffc91d6468ee25 Signed-off-by: Edward O'Callaghan quasisec@google.com --- M internal.c 1 file changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/26/70026/1
diff --git a/internal.c b/internal.c index 4f68456..9b80f37 100644 --- a/internal.c +++ b/internal.c @@ -211,6 +211,9 @@ if (ret) return ret;
+ /* Unconditionally reset global state from previous operation. */ + laptop_ok = false; + /* Default to Parallel/LPC/FWH flash devices. If a known host controller * is found, the host controller init routine sets the * internal_buses_supported bitfield.