Thomas Heijligen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/60110 )
Change subject: hwaccess: split out x86 port I/O related function into own files ......................................................................
hwaccess: split out x86 port I/O related function into own files
Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a Signed-off-by: Thomas Heijligen thomas.heijligen@secunet.com --- M Makefile M amd_imc.c M atahpt.c M atapromise.c M atavia.c M board_enable.c M chipset_enable.c M drkaiser.c M gfxnvidia.c M hwaccess.c M hwaccess.h A hwaccess_x86_io.c M hwaccess_x86_io.h M internal.c M it8212.c M it85spi.c M it87spi.c M meson.build M nic3com.c M nicintel.c M nicintel_eeprom.c M nicintel_spi.c M nicnatsemi.c M nicrealtek.c M ogp_spi.c M programmer.h M rayer_spi.c M satamv.c M satasii.c M wbsio_spi.c 30 files changed, 116 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/10/60110/1
diff --git a/Makefile b/Makefile index b196d98..7207abb 100644 --- a/Makefile +++ b/Makefile @@ -782,8 +782,8 @@
ifneq ($(NEED_RAW_ACCESS), ) # Raw memory, MSR or PCI port I/O access. -FEATURE_CFLAGS += -D'NEED_RAW_ACCESS=1' -PROGRAMMER_OBJS += physmap.o hwaccess.o +FEATURE_CFLAGS += -D'NEED_RAW_ACCESS=1' -D'__FLASHROM_HAVE_OUTB__=1' +PROGRAMMER_OBJS += physmap.o hwaccess.o hwaccess_x86_io.o
ifeq ($(TARGET_OS), NetBSD) ifeq ($(ARCH), x86) diff --git a/amd_imc.c b/amd_imc.c index f2f0972..93096f6 100644 --- a/amd_imc.c +++ b/amd_imc.c @@ -18,6 +18,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "spi.h" #include "platform/pci.h"
diff --git a/atahpt.c b/atahpt.c index d2712b8..70f0e6a 100644 --- a/atahpt.c +++ b/atahpt.c @@ -19,6 +19,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define BIOS_ROM_ADDR 0x90 diff --git a/atapromise.c b/atapromise.c index 92eba0c..56abc26 100644 --- a/atapromise.c +++ b/atapromise.c @@ -19,6 +19,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define MAX_ROM_DECODE (32 * 1024) diff --git a/atavia.c b/atavia.c index 6370d91..631c73e 100644 --- a/atavia.c +++ b/atavia.c @@ -21,6 +21,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_VIA 0x1106 diff --git a/board_enable.c b/board_enable.c index 339408a..4ca7101 100644 --- a/board_enable.c +++ b/board_enable.c @@ -26,6 +26,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#if defined(__i386__) || defined(__x86_64__) diff --git a/chipset_enable.c b/chipset_enable.c index 8588443..517918e 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -34,6 +34,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define NOT_DONE_YET 1 diff --git a/drkaiser.c b/drkaiser.c index 34b204e..565a45e 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -18,6 +18,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_DRKAISER 0x1803 diff --git a/gfxnvidia.c b/gfxnvidia.c index e85ce68..0d3ef39 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -19,6 +19,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_NVIDIA 0x10de diff --git a/hwaccess.c b/hwaccess.c index 9bfd8ea..4e8a274 100644 --- a/hwaccess.c +++ b/hwaccess.c @@ -25,17 +25,8 @@ #include <fcntl.h> #endif #include "flash.h" -#include "programmer.h" #include "hwaccess.h"
-#if USE_IOPERM -#include <sys/io.h> -#endif - -#if (defined (__i386__) || defined (__x86_64__) || defined(__amd64__)) && USE_DEV_IO -int io_fd; -#endif - /* Prevent reordering and/or merging of reads/writes to hardware. * Such reordering and/or merging would break device accesses which depend on the exact access order. */ @@ -70,59 +61,6 @@ #endif }
-#if (defined (__i386__) || defined (__x86_64__) || defined(__amd64__)) && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__)) -static int release_io_perms(void *p) -{ -#if defined (__sun) - sysi86(SI86V86, V86SC_IOPL, 0); -#elif USE_DEV_IO - close(io_fd); -#elif USE_IOPERM - ioperm(0, 65536, 0); -#elif USE_IOPL - iopl(0); -#endif - return 0; -} - -/* Get I/O permissions with automatic permission release on shutdown. */ -int rget_io_perms(void) -{ - #if defined (__sun) - if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { -#elif USE_DEV_IO - if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#elif USE_IOPERM - if (ioperm(0, 65536, 1) != 0) { -#elif USE_IOPL - if (iopl(3) != 0) { -#endif - msg_perr("ERROR: Could not get I/O privileges (%s).\n", strerror(errno)); - msg_perr("You need to be root.\n"); -#if defined (__OpenBSD__) - msg_perr("If you are root already please set securelevel=-1 in /etc/rc.securelevel and\n" - "reboot, or reboot into single user mode.\n"); -#elif defined(__NetBSD__) - msg_perr("If you are root already please reboot into single user mode or make sure\n" - "that your kernel configuration has the option INSECURE enabled.\n"); -#endif - return 1; - } else { - register_shutdown(release_io_perms, NULL); - } - return 0; -} - -#else - -/* DJGPP and libpayload environments have full PCI port I/O permissions by default. */ -/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ -int rget_io_perms(void) -{ - return 0; -} -#endif - void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val; diff --git a/hwaccess.h b/hwaccess.h index e5edcfa..5b7b079 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -124,8 +124,6 @@
#if NEED_RAW_ACCESS == 1 && (defined (__i386__) || defined (__x86_64__) || defined(__amd64__))
-#include "hwaccess_x86_io.h" - #if !(defined(__MACH__) && defined(__APPLE__)) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__) typedef struct { uint32_t hi, lo; } msr_t; msr_t rdmsr(int addr); diff --git a/hwaccess_x86_io.c b/hwaccess_x86_io.c new file mode 100644 index 0000000..9f0eb6e --- /dev/null +++ b/hwaccess_x86_io.c @@ -0,0 +1,87 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009,2010 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <errno.h> +#include <string.h> +#if !defined (__DJGPP__) && !defined(__LIBPAYLOAD__) +/* No file access needed/possible to get hardware access permissions. */ +#include <unistd.h> +#include <fcntl.h> +#endif + +#include "hwaccess_x86_io.h" +#include "flash.h" + +#if USE_IOPERM +#include <sys/io.h> +#endif + +#if (defined (__i386__) || defined (__x86_64__) || defined(__amd64__)) && USE_DEV_IO +int io_fd; +#endif + +#if (defined (__i386__) || defined (__x86_64__) || defined(__amd64__)) && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__)) +static int release_io_perms(void *p) +{ +#if defined (__sun) + sysi86(SI86V86, V86SC_IOPL, 0); +#elif USE_DEV_IO + close(io_fd); +#elif USE_IOPERM + ioperm(0, 65536, 0); +#elif USE_IOPL + iopl(0); +#endif + return 0; +} + +/* Get I/O permissions with automatic permission release on shutdown. */ +int rget_io_perms(void) +{ + #if defined (__sun) + if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { +#elif USE_DEV_IO + if ((io_fd = open("/dev/io", O_RDWR)) < 0) { +#elif USE_IOPERM + if (ioperm(0, 65536, 1) != 0) { +#elif USE_IOPL + if (iopl(3) != 0) { +#endif + msg_perr("ERROR: Could not get I/O privileges (%s).\n", strerror(errno)); + msg_perr("You need to be root.\n"); +#if defined (__OpenBSD__) + msg_perr("If you are root already please set securelevel=-1 in /etc/rc.securelevel and\n" + "reboot, or reboot into single user mode.\n"); +#elif defined(__NetBSD__) + msg_perr("If you are root already please reboot into single user mode or make sure\n" + "that your kernel configuration has the option INSECURE enabled.\n"); +#endif + return 1; + } else { + register_shutdown(release_io_perms, NULL); + } + return 0; +} + +#else + +/* DJGPP and libpayload environments have full PCI port I/O permissions by default. */ +/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ +int rget_io_perms(void) +{ + return 0; +} +#endif \ No newline at end of file diff --git a/hwaccess_x86_io.h b/hwaccess_x86_io.h index 63692b8..0d16fdd 100644 --- a/hwaccess_x86_io.h +++ b/hwaccess_x86_io.h @@ -29,8 +29,6 @@ #include <sys/io.h> #endif
-#define __FLASHROM_HAVE_OUTB__ 1 - /* for iopl and outb under Solaris */ #if defined (__sun) #include <sys/sysi86.h> @@ -38,6 +36,8 @@ #include <asm/sunddi.h> #endif
+int rget_io_perms(void); + /* Clarification about OUTB/OUTW/OUTL argument order: * OUT[BWL](val, port) */ diff --git a/internal.c b/internal.c index 4a8e27b..7de1d6a 100644 --- a/internal.c +++ b/internal.c @@ -20,6 +20,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
int is_laptop = 0; diff --git a/it8212.c b/it8212.c index 60997f7..80da2b1 100644 --- a/it8212.c +++ b/it8212.c @@ -18,6 +18,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
static uint8_t *it8212_bar = NULL; diff --git a/it85spi.c b/it85spi.c index 17e4e10..b1074d1 100644 --- a/it85spi.c +++ b/it85spi.c @@ -27,6 +27,7 @@ #include "spi.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h"
#define MAX_TIMEOUT 100000 #define MAX_TRY 5 diff --git a/it87spi.c b/it87spi.c index 5f6fb65..0944915 100644 --- a/it87spi.c +++ b/it87spi.c @@ -26,6 +26,7 @@ #include "chipdrivers.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "spi.h"
#define ITE_SUPERIO_PORT1 0x2e diff --git a/meson.build b/meson.build index 85f40ba..5cbcac2 100644 --- a/meson.build +++ b/meson.build @@ -347,8 +347,10 @@ # raw memory, MSR or PCI port I/O access if need_raw_access srcs += 'hwaccess.c' + srcs += 'hwaccess_x86_io.c' srcs += 'physmap.c' cargs += '-DNEED_RAW_ACCESS=1' + cargs += '-D__FLASHROM_HAVE_OUTB__=1' endif
# raw serial IO diff --git a/nic3com.c b/nic3com.c index f7d2a97..21748cc 100644 --- a/nic3com.c +++ b/nic3com.c @@ -18,6 +18,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define BIOS_ROM_ADDR 0x04 diff --git a/nicintel.c b/nicintel.c index 1730ca4..7f4eb24 100644 --- a/nicintel.c +++ b/nicintel.c @@ -19,6 +19,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
static uint8_t *nicintel_bar; diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index ab75343..fc2ef40 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -35,6 +35,7 @@ #include "spi.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_INTEL 0x8086 diff --git a/nicintel_spi.c b/nicintel_spi.c index f1ed129..25a6651 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -35,6 +35,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_INTEL 0x8086 diff --git a/nicnatsemi.c b/nicnatsemi.c index 9dd3915..6c7bd61 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -18,6 +18,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_NATSEMI 0x100b diff --git a/nicrealtek.c b/nicrealtek.c index 0bf60fd..4274e56 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -18,6 +18,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_REALTEK 0x10ec diff --git a/ogp_spi.c b/ogp_spi.c index 105f468..4a4934e 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -19,6 +19,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_OGP 0x1227 diff --git a/programmer.h b/programmer.h index b4f04e7..b8b5bbc 100644 --- a/programmer.h +++ b/programmer.h @@ -271,7 +271,6 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); #endif -int rget_io_perms(void); #if CONFIG_INTERNAL == 1 extern int is_laptop; extern int laptop_ok; diff --git a/rayer_spi.c b/rayer_spi.c index e65eb78..5fae8b9 100644 --- a/rayer_spi.c +++ b/rayer_spi.c @@ -29,6 +29,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h"
/* We have two sets of pins, out and in. The numbers for both sets are * independent and are bitshift values, not real pin numbers. diff --git a/satamv.c b/satamv.c index b69350f..8543f53 100644 --- a/satamv.c +++ b/satamv.c @@ -20,6 +20,7 @@ #include "flash.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
static uint8_t *mv_bar; diff --git a/satasii.c b/satasii.c index d015f7f..2f220d1 100644 --- a/satasii.c +++ b/satasii.c @@ -18,6 +18,7 @@
#include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "platform/pci.h"
#define PCI_VENDOR_ID_SII 0x1095 diff --git a/wbsio_spi.c b/wbsio_spi.c index 60b725f..805abf7 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -20,6 +20,7 @@ #include "chipdrivers.h" #include "programmer.h" #include "hwaccess.h" +#include "hwaccess_x86_io.h" #include "spi.h"
#define WBSIO_PORT1 0x2e