Attention is currently required from: Sam McNally, Nico Huber, Rizwan Qureshi, Edward O'Callaghan, Angel Pons.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 )
Change subject: ichspi: Add Alder Lake support
......................................................................
Patch Set 11:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/62251/comment/a286c447_14b6e108
PS11, Line 1063: CHIPSET_600_SERIES_ALDER_POINT
`guess_ich_chipset_from_content()` needs to be updated accordingly.
Agree, we need to add at https://review.coreboot.org/c/flashrom/+/62251/11/ich_descriptors.c#1040 to identify the chipset proper atleast using new CPU Soft Strap Length (CSSL) field. As per SPI programming guide, the value for CSSL is 0x14 on ADL.
if (content->CSSL == 0x14)
return CHIPSET_600_SERIES_ALDER_POINT;
Also you can consider changing the default to 600 series now as latest
msg_pwarn("Unknown flash descriptor, assuming 600 series compatibility.\n");
return CHIPSET_600_SERIES_ALDER_POINT;
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