Attention is currently required from: Subrata Banik, Nico Huber, Paul Menzel, Angel Pons, Anastasia Klimchuk. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62867 )
Change subject: ichspi: Unify timeouts across all SPI operations to 30s ......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS5:
I think the reason to use smaller timeout values in some cases is to avoid unnecessary delays.
I don't understand the comment here about *delay*, 30sec is the timeout value for the worst case scenario to avoid the SPI contention issue among multi-master scenario, it's not *forced delay* that would impact every chipsets. You could see more of the operations are still getting over within few ms of timeout.
30 seconds is the recommended timeout for the worst-case scenario.
Personally, I don't think using the 30-sec timeout everywhere is beneficial.
Unless increased the timeout value in general, how would we know if it is applicable or not? I guess you are referring about SPI read operation which might not get impacted due to multi-master worst case operation as chipset has *fast-read* feature.
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Subrata Banik (Code Review)