Attention is currently required from: Rizwan Qureshi, Edward O'Callaghan, Angel Pons. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 )
Change subject: ichspi: Add Alder Lake support ......................................................................
Patch Set 12:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/62251/comment/452004b1_2386a95f PS12, Line 12: TEST=```localhost ~ # flashrom --flash-name
Any other tests, e.g. reading? If the ME region is locked, you can still read the other regions. […]
``` flashrom -p internal --ifd -i fd -i bios -r /tmp/filename.rom flashrom unknown on Linux 5.15.22 (x86_64) flashrom is free software, get the source code at https://flashrom.org
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). coreboot table found at 0x768a7000. Found chipset "Intel Alder Lake-N". Enabling flash write... Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed. New value is 0x8b. SPI Configuration is locked down. OK. Found Winbond flash chip "W25Q256JV_M" (32768 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Error accessing W25Q256JV_M, 0x2000000 bytes at 0x00000000fe000000 /dev/mem mmap failed: Resource temporarily unavailable Could not map flash chip W25Q256JV_M at 0x00000000fe000000. Reading ich descriptor... done. Using regions: "bios", "fd". Error accessing W25Q256JV_M, 0x2000000 bytes at 0x00000000fe000000 /dev/mem mmap failed: Resource temporarily unavailable Could not map flash chip W25Q256JV_M at 0x00000000fe000000. Reading flash... done. SUCCESS ```
Reading with
flashrom -r /tmp/filename2.rom -i SI_BIOS -i SI_DESC
produces an identical file. A glance through a hexdump shows reasonable-looking content with the expected gap for the ME region.
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Sam McNally (Code Review)