Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62868 )
Change subject: ichspi: Introduce HSFC CYCLE READ/WRITE/ERASE macros
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/62868/comment/f4f91b0f_088dad88
PS1, Line 9: List of changes:
: 1. Introduced useful macros (read/write/erase/status etc.) and used
: throughout the SPI operations.
: 2. Drop unused macros.
: 3. SPI operations are using `control register (offset 0x6)` hence
: converted 32-bit reads into 16-bit read to cover the only hardware
: sequencing control register alone.
commit message is also misaligned with the patch content. For example (3) doesn't apply here?
rebased this CL after addressing this review comment.
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