Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/69842 )
(
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: opaque_master: Mark Opaque chip as tested for WP ......................................................................
opaque_master: Mark Opaque chip as tested for WP
Opaque masters, by design, populate the flashchip structure during the execution of their probe function. Therefore any opaque master operation displays a message to the user: "This flash part has status UNTESTED for operations: WP".
However, for all the other operations (read, write, erase) opaque masters always mark them as tested. Thus, align WP as marked tested inline with other opaque chip operations.
BUG=b:258755442 TEST=the following does not display untested message: 1) flashrom -p dummy:size=8388608,emulate=VARIABLE_SIZE 2) flashrom -p internal (on Intel device)
Change-Id: I5ae4cb49eb0abc6ab26cfe2f3359e4e50dd4fd4f Signed-off-by: Anastasia Klimchuk aklm@chromium.org Reviewed-on: https://review.coreboot.org/c/flashrom/+/69842 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Edward O'Callaghan quasisec@chromium.org Reviewed-by: Sergii Dmytruk sergii.dmytruk@3mdeb.com Reviewed-by: Felix Singer felixsinger@posteo.net --- M dummyflasher.c M ichspi.c M nicintel_eeprom.c 3 files changed, 33 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, but someone else must approve Edward O'Callaghan: Looks good to me, approved Sergii Dmytruk: Looks good to me, but someone else must approve
diff --git a/dummyflasher.c b/dummyflasher.c index 110a88c..35cdfef 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -145,7 +145,7 @@ msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__, flash->chip->total_size);
- flash->chip->tested = TEST_OK_PREW; + flash->chip->tested = TEST_OK_PREWB;
if (emu_data->erase_to_zero) flash->chip->feature_bits |= FEATURE_ERASED_ZERO; diff --git a/ichspi.c b/ichspi.c index 4e982f0..cd330e3 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1485,7 +1485,7 @@ msg_cdbg("In that range are %d erase blocks with %d B each.\n", size_high / erase_size_high, erase_size_high); } - flash->chip->tested = TEST_OK_PREW; + flash->chip->tested = TEST_OK_PREWB; return 1; }
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index ff2c3ce..4d5ab6b 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -115,7 +115,7 @@ /* Emulated eeprom has a fixed size of 4 KB */ flash->chip->total_size = 4; flash->chip->page_size = flash->chip->total_size * 1024; - flash->chip->tested = TEST_OK_PREW; + flash->chip->tested = TEST_OK_PREWB; flash->chip->gran = write_gran_1byte_implicit_erase; flash->chip->block_erasers->eraseblocks[0].size = flash->chip->page_size; flash->chip->block_erasers->eraseblocks[0].count = 1; @@ -146,7 +146,7 @@ }
flash->chip->page_size = EE_PAGE_MASK + 1; - flash->chip->tested = TEST_OK_PREW; + flash->chip->tested = TEST_OK_PREWB; flash->chip->gran = write_gran_1byte_implicit_erase; flash->chip->block_erasers->eraseblocks[0].size = (EE_PAGE_MASK + 1); flash->chip->block_erasers->eraseblocks[0].count = (flash->chip->total_size * 1024) / (EE_PAGE_MASK + 1);