Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/22423 )
Change subject: flashchips: Revise all 4BA chips ......................................................................
flashchips: Revise all 4BA chips
Advertise all 4BA features that are currently supported by flashrom, plus add a new feature flag for the 4BA fast-read instruction. Also, list all supported 3BA and 4BA erase-block functions.
As this adds a lot of new code paths that could be taken for these chips, mark them all as untested again.
Change-Id: I0598496ee7058e3b170684d366f58e4014e0e871 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/22423 Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: David Hendricks david.hendricks@gmail.com --- M flash.h M flashchips.c 2 files changed, 50 insertions(+), 16 deletions(-)
Approvals: Stefan Reinauer: Looks good to me, approved build bot (Jenkins): Verified David Hendricks: Looks good to me, approved
diff --git a/flash.h b/flash.h index 6e86c35..d31b256 100644 --- a/flash.h +++ b/flash.h @@ -98,9 +98,9 @@
/* * How many different erase functions do we have per chip? - * Atmel AT25FS010 has 6 different functions. + * Macronix MX25L25635F has 8 different functions. */ -#define NUM_ERASEFUNCTIONS 6 +#define NUM_ERASEFUNCTIONS 8
/* Feature bits used for non-SPI only */ #define FEATURE_REGISTERMAP (1 << 0) @@ -124,7 +124,12 @@ #define FEATURE_4BA_EXT_ADDR (1 << 12) /**< Regular 3-byte operations can be used by writing the most significant address byte into an extended address register. */ #define FEATURE_4BA_READ (1 << 13) /**< Native 4BA read instruction (0x13) is supported. */ -#define FEATURE_4BA_WRITE (1 << 14) /**< Native 4BA byte program (0x12) is supported. */ +#define FEATURE_4BA_FAST_READ (1 << 14) /**< Native 4BA fast read instruction (0x0c) is supported. */ +#define FEATURE_4BA_WRITE (1 << 15) /**< Native 4BA byte program (0x12) is supported. */ +/* 4BA Shorthands */ +#define FEATURE_4BA_NATIVE (FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_4BA_WRITE) +#define FEATURE_4BA (FEATURE_4BA_ENTER | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE) +#define FEATURE_4BA_WREN (FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
enum test_state { OK = 0, diff --git a/flashchips.c b/flashchips.c index 0e16a48..e389af6 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8127,27 +8127,36 @@
{ .vendor = "Macronix", - .name = "MX25L25635F/MX25L25645E/MX25L25665E", + .name = "MX25L25635F", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L25635F, .total_size = 32768, .page_size = 256, /* OTP: 512B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER, - .tested = TEST_OK_PREW, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA, + .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 1024} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 512} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {32 * 1024 * 1024, 1} }, @@ -8174,20 +8183,29 @@ .total_size = 65536, .page_size = 256, /* OTP: 512B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER, - .tested = TEST_OK_PREW, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA, + .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 16384} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 2048} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 1024} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {64 * 1024 * 1024, 1} }, @@ -9914,9 +9932,8 @@ .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP - | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE, - .tested = TEST_OK_PREW, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { @@ -9924,9 +9941,15 @@ .eraseblocks = { {4 * 1024, 8192} }, .block_erase = spi_block_erase_21, }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { .eraseblocks = { {64 * 1024, 512} }, .block_erase = spi_block_erase_dc, }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { .eraseblocks = { {32768 * 1024, 1} }, .block_erase = spi_block_erase_c7, } @@ -9948,9 +9971,8 @@ .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP - | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE, - .tested = TEST_OK_PREW, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { @@ -9958,9 +9980,15 @@ .eraseblocks = { {4 * 1024, 16384} }, .block_erase = spi_block_erase_21, }, { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { .eraseblocks = { {64 * 1024, 1024} }, .block_erase = spi_block_erase_dc, }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { .eraseblocks = { {65536 * 1024, 1} }, .block_erase = spi_block_erase_c7, } @@ -14827,8 +14855,9 @@ /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ, - .tested = TEST_OK_PREW, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN + | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ, + .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers =