Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/30361 )
Change subject: chipset_enable.c: Mark Intel C224 as DEP ......................................................................
chipset_enable.c: Mark Intel C224 as DEP
Tested on a Supermicro X10SLM+-F. The flash chip has been read, written, and erased many times without issue. Most boards with this chipset will have the ME region locked, hence the selection of DEP.
Change-Id: I25126b94e691289a7b29dd81d5c864854a4e0245 Signed-off-by: Tristan Corrick tristan@corrick.kiwi Reviewed-on: https://review.coreboot.org/c/30361 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c index cbb88fd..4d624a3 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1841,7 +1841,7 @@ {0x8086, 0x8c51, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c52, NT, "Intel", "C222", enable_flash_pch8}, {0x8086, 0x8c53, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c54, NT, "Intel", "C224", enable_flash_pch8}, + {0x8086, 0x8c54, DEP, "Intel", "C224", enable_flash_pch8}, {0x8086, 0x8c55, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c56, NT, "Intel", "C226", enable_flash_pch8}, {0x8086, 0x8c57, NT, "Intel", "Lynx Point", enable_flash_pch8},