[L] Change in flashrom[master]: ch347_spi.c: Initial support for the WCH CH347

[Nicholas Chin (Code Review)]

Nicholas Chin has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/70573 )

Change subject: ch347_spi.c: Initial support for the WCH CH347
......................................................................

ch347_spi.c: Initial support for the WCH CH347

Add support for the WCH CH347, a high-speed USB to bus converter
supporting multiple protocols interfaces including SPI. Currently only
mode 1 (vendor defined communication interface) is supported, mode 2
(USB HID communication interface) support will be added later. The code
is currently hard coded to use a CS1 and a SPI clock of 60 MHz, though
there are 2 CS lines and 6 other GPIO lines available, as well as a
configurable clock divisor. Support for these will be exposed through
programmer parameters in later commits.

This currently uses the synchronous libusb API. Performance seems to be
alright so far, if it becomes an issue I may switch to the asynchronous
API.

Tested with a MX25L1606E flash chip and a hard coded divisor of 3 for a
SPI clock speed of 15 MHz, as I was having signal integrity issues at
higher clock speeds.

Signed-off-by: Nicholas Chin 
Change-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba
---
M Makefile
A ch347_spi.c
M include/programmer.h
M programmer_table.c
4 files changed, 388 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/70573/1

diff --git a/Makefile b/Makefile
index 425b58c..955ce4b 100644
--- a/Makefile
+++ b/Makefile
@@ -155,6 +155,7 @@

DEPENDS_ON_LIBUSB1 := \
    CONFIG_CH341A_SPI \
+	CONFIG_CH347_SPI \
    CONFIG_DEDIPROG \
    CONFIG_DEVELOPERBOX_SPI \
    CONFIG_DIGILENT_SPI \
@@ -516,6 +517,9 @@
 # Winchiphead CH341A
 CONFIG_CH341A_SPI ?= yes

+# Winchiphead CH347
+CONFIG_CH347_SPI ?= yes
+
 # Digilent Development board JTAG
 CONFIG_DIGILENT_SPI ?= yes

@@ -767,6 +771,11 @@
 PROGRAMMER_OBJS += ch341a_spi.o
 endif

+ifeq ($(CONFIG_CH347_SPI), yes)
+FEATURE_FLAGS += -D'CONFIG_CH347_SPI=1'
+PROGRAMMER_OBJS += ch347_spi.o
+endif
+
 ifeq ($(CONFIG_DIGILENT_SPI), yes)
 FEATURE_FLAGS += -D'CONFIG_DIGILENT_SPI=1'
 PROGRAMMER_OBJS += digilent_spi.o
diff --git a/ch347_spi.c b/ch347_spi.c
new file mode 100644
index 0000000..f8c7edd
--- /dev/null
+++ b/ch347_spi.c
@@ -0,0 +1,347 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2022 Nicholas Chin 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <string.h>
+#include <stdlib.h>
+#include <libusb.h>
+#include "platform.h"
+#include "programmer.h"
+#include "flash.h"
+
+#define CH347_CMD_SPI_CFG 0xC0
+#define CH347_CMD_SPI_CS_CTRL 0xC1
+#define CH347_CMD_SPI_OUT_IN 0xC2
+#define CH347_CMD_SPI_IN 0xC3
+#define CH347_CMD_SPI_OUT 0xC4
+
+#define CH347_CS_ASSERT 0x00
+#define CH347_CS_DEASSERT 0x40
+#define CH347_CS_CHANGE 0x80
+#define CH347_CS_IGNORE 0x00
+
+#define WRITE_EP 0x06
+#define READ_EP 0x86
+
+#define MODE_1_IFACE 2
+#define MODE_2_IFACE 1
+
+/* The USB descriptor says the max transfer size is 512 bytes, but the
+ * vendor driver only seems to transfer a maximum of 510 bytes at once,
+ * leaving 507 bytes for data as the command + length take up 3 bytes
+ */
+#define CH347_MAX_DATA_LEN 507
+
+
+static struct libusb_device_handle *handle = NULL;
+
+/* TODO: Add support for HID mode */
+static const struct dev_entry devs_ch347_spi[1] = {
+	{0x1A86, 0x55DB, OK, "QinHeng Electronics", "USB To UART+SPI+I2C"}
+};
+
+static int ch347_spi_shutdown(void *data)
+{
+	if (handle == NULL)
+		return -1;
+	/* TODO: Set this depending on the mode */
+	int spi_interface = MODE_1_IFACE;
+	libusb_release_interface(handle, spi_interface);
+	libusb_attach_kernel_driver(handle, spi_interface);
+	libusb_close(handle);
+	libusb_exit(NULL);
+	handle = NULL;
+	return 0;
+}
+
+static int ch347_set_cs(uint8_t cs1, uint8_t cs2)
+{
+	uint8_t cmd[13] = {0};
+	cmd[0] = CH347_CMD_SPI_CS_CTRL;
+	/* payload length, uint16 LSB: 10 */
+	cmd[1] = 10;
+
+	cmd[3] = cs1;
+	cmd[8] = cs2;
+
+	int32_t ret = libusb_bulk_transfer(handle, WRITE_EP, cmd, sizeof(cmd), NULL, 1000);
+	if (ret < 0) {
+		msg_perr("Could not change CS!\n");
+		return -1;
+	}
+	return 0;
+}
+
+
+static int ch347_write(unsigned int writecnt, const uint8_t *writearr)
+{
+	unsigned int data_len = writecnt;
+	uint8_t resp_buf[4] = {0};
+	int packet_len = 0;
+	unsigned int i = 0;
+	int ret = 0;
+	int transferred = 0;
+	if (data_len > CH347_MAX_DATA_LEN) {
+		data_len = CH347_MAX_DATA_LEN;
+	}
+	packet_len = data_len + 3;
+
+	/* 3 bytes for command + data length */
+	uint8_t *buffer = malloc(packet_len);
+	if (buffer == NULL) {
+		msg_perr("Could not allocate write buffer\n");
+	}
+
+	while (i < writecnt) {
+		buffer[0] = CH347_CMD_SPI_OUT;
+		buffer[1] = (data_len) & 0xFF;
+		buffer[2] = ((data_len) & 0xFF00) >> 8;
+		memcpy(buffer + 3, writearr + i, data_len);
+		ret = libusb_bulk_transfer(handle, WRITE_EP, buffer, packet_len, &transferred, 1000);
+		if (ret < 0 || transferred != packet_len) {
+			msg_perr("Could not write\n");
+			return -1;
+		}
+		ret = libusb_bulk_transfer(handle, READ_EP, resp_buf, sizeof(resp_buf), NULL, 1000);
+		if (ret < 0) {
+			msg_perr("Could not read write response\n");
+			return -1;
+		}
+		i += data_len;
+		data_len = writecnt - i;
+		if (data_len > CH347_MAX_DATA_LEN) {
+			data_len = CH347_MAX_DATA_LEN;
+		}
+		packet_len = data_len + 3;
+	}
+	return 0;
+}
+
+static int ch347_read(unsigned int readcnt, uint8_t *readarr)
+{
+	uint8_t *read_ptr = readarr;
+	uint8_t command_buf[7] = {0};
+	int ret = 0;
+	int transferred = 0;
+	unsigned int read = 0;
+
+	/* 3 bytes for command + data length */
+	uint8_t *buffer = malloc(CH347_MAX_DATA_LEN + 3);
+	if (buffer == NULL) {
+		msg_perr("Could not allocate read buffer\n");
+	}
+	command_buf[0] = CH347_CMD_SPI_IN;
+	command_buf[1] = 4;
+	command_buf[2] = 0;
+	command_buf[3] = readcnt & 0xFF;
+	command_buf[4] = (readcnt & 0xFF00) >> 8;
+	command_buf[5] = (readcnt & 0xFF0000) >> 16;
+	command_buf[6] = (readcnt & 0xFF000000) >> 24;
+
+	ret = libusb_bulk_transfer(handle, WRITE_EP, command_buf, sizeof(command_buf), &transferred, 1000);
+	if (ret < 0 || transferred != sizeof(command_buf)) {
+		msg_perr("Could not send read command\n");
+		return -1;
+	}
+
+	while (read < readcnt) {
+		ret = libusb_bulk_transfer(handle, READ_EP, buffer, CH347_MAX_DATA_LEN + 3, NULL, 1000);
+		if (ret < 0) {
+			printf(libusb_error_name(ret));
+			msg_perr("Could not read data\n");
+			return -1;
+		}
+		transferred = read_le16(buffer, 1);
+		read += transferred;
+		if (read > readcnt) {
+			msg_perr("CH347 returned more bytes than requested!");
+			return -1;
+		}
+		memcpy(read_ptr, buffer + 3, transferred);
+		read_ptr += transferred;
+	}
+	return 0;
+}
+
+static int ch347_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
+{
+	int ret = 0;
+
+	ch347_set_cs(CH347_CS_ASSERT | CH347_CS_CHANGE, CH347_CS_IGNORE);
+	if (writecnt) {
+		ret = ch347_write(writecnt, writearr);
+		if (ret < 0) {
+			perror("CH347 write error\n");
+			return -1;
+		}
+	}
+	if (readcnt) {
+		ret = ch347_read(readcnt, readarr);
+		if (ret < 0) {
+			perror("CH347 read error\n");
+			return -1;
+		}
+	}
+	ch347_set_cs(CH347_CS_DEASSERT | CH347_CS_CHANGE, CH347_CS_IGNORE);
+
+	return 0;
+}
+
+static int32_t ch347_spi_config(uint8_t divisor)
+{
+	if (handle == NULL)
+		return -1;
+	uint8_t read_cfg_cmd[] = {0xCA, 0x01, 0x00, 0x01};
+	uint8_t buff[29] = {0};
+	int32_t ret = libusb_bulk_transfer(handle, WRITE_EP, read_cfg_cmd, sizeof(read_cfg_cmd), NULL, 1000);
+	if (ret < 0) {
+		msg_perr("Could not send read config command!\n");
+	}
+	ret = libusb_bulk_transfer(handle, READ_EP, buff, sizeof(buff), NULL, 1000);
+	if (ret < 0) {
+		msg_perr("Could not read CH347 config!\n");
+	}
+	buff[0] = CH347_CMD_SPI_CFG;
+	buff[1] = (sizeof(buff)-3) & 0xFF;
+	buff[2] = ((sizeof(buff)-3) & 0xFF00) >> 8;
+	/* Not sure what these two bytes do, but the vendor
+	 * drivers seem to unconditionally set these values
+	 */ 
+	buff[5] = 4;
+	buff[6] = 1;
+	/* Clock polarity: bit 1 */
+	buff[9] = 0;
+	/* Clock phase: bit 0 */
+	buff[11] = 0;
+	/* Another mystery byte */
+	buff[14] = 2;
+	/* Clock divisor: bits 5:3 */
+	buff[15] = (divisor & 0x7) << 3;
+	/* Bit order: bit 7, 0=MSB */
+	buff[17] = 0;
+	/* Yet another mystery byte */
+	buff[19] = 7;
+	/* CS polarity: bit 7 CS2, bit 6 CS1. 0 = active low */
+	buff[24] = 0;
+
+	ret = libusb_bulk_transfer(handle, WRITE_EP, buff, sizeof(buff), NULL, 1000);
+	if (ret < 0) {
+		msg_perr("Could not configure SPI interface!\n");
+	}
+	/* FIXME: Not sure if the CH347 sends error responses for
+	 * invalid config data, if so the code should check
+	 */
+	ret = libusb_bulk_transfer(handle, READ_EP, buff, sizeof(buff), NULL, 1000);
+	if (ret < 0) {
+		msg_perr("Could not read response!\n");
+	}
+	return ret;
+}
+
+static const struct spi_master spi_master_ch347_spi = {
+	.features = SPI_MASTER_4BA,
+	.max_data_read = 64 * 1024,
+	.max_data_write = 64 * 1024,
+	.command = ch347_spi_send_command,
+	.multicommand = default_spi_send_multicommand,
+	.read = default_spi_read,
+	.write_256 = default_spi_write_256,
+	.write_aai = default_spi_write_aai,
+	.shutdown = ch347_spi_shutdown,
+	.probe_opcode = default_spi_probe_opcode,
+};
+
+/* Largely copied from ch341a_spi.c */
+static int ch347_spi_init(const struct programmer_cfg *cfg)
+{
+	if (handle != NULL) {
+		msg_cerr("%s: handle already set! Please report a bug at [e-mail]\n", __func__);
+		return -1;
+	}
+
+	int32_t ret = libusb_init(NULL);
+	if (ret < 0) {
+		msg_perr("Couldn't initialize libusb!\n");
+		return -1;
+	}
+
+	/* Enable information, warning, and error messages (only). */
+#if LIBUSB_API_VERSION < 0x01000106
+	libusb_set_debug(NULL, 3);
+#else
+	libusb_set_option(NULL, LIBUSB_OPTION_LOG_LEVEL, LIBUSB_LOG_LEVEL_INFO);
+#endif
+
+	uint16_t vid = devs_ch347_spi[0].vendor_id;
+	uint16_t pid = devs_ch347_spi[0].device_id;
+	handle = libusb_open_device_with_vid_pid(NULL, vid, pid);
+	if (handle == NULL) {
+		msg_perr("Couldn't open device %04x:%04x.\n", vid, pid);
+		return -1;
+	}
+
+	/* TODO: set based on mode */
+	/* Mode 1 uses interface 2 for the SPI interface */
+	int spi_interface = MODE_1_IFACE;
+
+	ret = libusb_detach_kernel_driver(handle, spi_interface);
+	if (ret != 0 && ret != LIBUSB_ERROR_NOT_FOUND)
+		msg_pwarn("Cannot detach the existing USB driver. Claiming the interface may fail. %s\n",
+			libusb_error_name(ret));
+	ret = libusb_claim_interface(handle, spi_interface);
+	if (ret != 0) {
+		msg_perr("Failed to claim interface 2: '%s'\n", libusb_error_name(ret));
+		goto close_handle;
+	}
+
+	struct libusb_device *dev;
+	if (!(dev = libusb_get_device(handle))) {
+		msg_perr("Failed to get device from device handle.\n");
+		goto close_handle;
+	}
+
+	struct libusb_device_descriptor desc;
+	ret = libusb_get_device_descriptor(dev, &desc);
+	if (ret < 0) {
+		msg_perr("Failed to get device descriptor: '%s'\n", libusb_error_name(ret));
+		goto release_interface;
+	}
+
+	msg_pdbg("Device revision is %d.%01d.%01d\n",
+		(desc.bcdDevice >> 8) & 0x00FF,
+		(desc.bcdDevice >> 4) & 0x000F,
+		(desc.bcdDevice >> 0) & 0x000F);
+
+	/* TODO: add programmer cfg for things like CS pin and divisor */
+	if (ch347_spi_config(0) < 0)
+		goto release_interface;
+
+	return register_spi_master(&spi_master_ch347_spi, NULL);
+
+release_interface:
+	libusb_release_interface(handle, spi_interface);
+close_handle:
+	libusb_attach_kernel_driver(handle, spi_interface);
+	libusb_close(handle);
+	handle = NULL;
+	return -1;
+}
+
+const struct programmer_entry programmer_ch347_spi = {
+	.name = "ch347_spi",
+	.type = USB,
+	.devs.dev = devs_ch347_spi,
+	.init = ch347_spi_init,
+};
diff --git a/include/programmer.h b/include/programmer.h
index 7bcef02..b8e87bc 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -62,6 +62,7 @@
 extern const struct programmer_entry programmer_atavia;
 extern const struct programmer_entry programmer_buspirate_spi;
 extern const struct programmer_entry programmer_ch341a_spi;
+extern const struct programmer_entry programmer_ch347_spi;
 extern const struct programmer_entry programmer_dediprog;
 extern const struct programmer_entry programmer_developerbox;
 extern const struct programmer_entry programmer_digilent_spi;
diff --git a/programmer_table.c b/programmer_table.c
index d58a155..954ed5a 100644
--- a/programmer_table.c
+++ b/programmer_table.c
@@ -152,6 +152,10 @@
     &programmer_ch341a_spi,
 #endif

+#if CONFIG_CH347_SPI == 1
+    &programmer_ch347_spi,
+#endif
+
 #if CONFIG_DIGILENT_SPI == 1
     &programmer_digilent_spi,
 #endif