[flashrom-gerrit] [S] Change in flashrom[main]: flashchips: Add support for MXIC MX25R8035F

[DZ (Code Review)]

DZ has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81837?usp=email )

Change subject: flashchips: Add support for MXIC MX25R8035F
......................................................................

flashchips: Add support for MXIC MX25R8035F

The MX25R8035F has been tested by ch341a programmer : read, write,
erase and wp.

We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.

MX25R8035F datasheet is available at the following URL:
https://www.macronix.com/Lists/Datasheet/Attachments/8749/MX25R8035F,%20Wide...

Change-Id: Iec244ffc29278c1f8c3ae47d17af2c4fe5fbe498
Signed-off-by: DanielZhang 
---
M flashchips.c
M include/flashchips.h
2 files changed, 48 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/81837/1

diff --git a/flashchips.c b/flashchips.c
index 7a40f07..e1e774c 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10213,6 +10213,53 @@

{
    	.vendor		= "Macronix",
+		.name		= "MX25R8035F",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= MACRONIX_ID,
+		.model_id	= MACRONIX_MX25R8035F,
+		.total_size	= 1024,
+		.page_size	= 256,
+		/* OTP: 1024B total; enter 0xB1, exit 0xC1 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR,
+		.tested		= TEST_OK_PREWB,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 256} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 32} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 16} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				.eraseblocks = { {1 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_60,
+			}, {
+				.eraseblocks = { {1 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			}
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
+		.write		= SPI_CHIP_WRITE256,
+		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {1650, 3600},
+		.reg_bits	=
+		{
+			.srp    = {STATUS1, 7, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW},  {STATUS1, 5, RW}},
+			.tb     = {CONFIG, 3, OTP}
+		},
+
+		.decode_range	= DECODE_RANGE_SPI25,
+	},
+
+	{
+		.vendor		= "Macronix",
    	.name		= "MX25V4035F",
    	.bustype	= BUS_SPI,
    	.manufacture_id	= MACRONIX_ID,
diff --git a/include/flashchips.h b/include/flashchips.h
index 103e6ea..c9303d5 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -540,6 +540,7 @@
 #define MACRONIX_MX25R1635F	0x2815
 #define MACRONIX_MX25R3235F	0x2816
 #define MACRONIX_MX25R6435F	0x2817
+#define MACRONIX_MX25R8035F     0x2814

#define MACRONIX_MX29F001B	0x19
 #define MACRONIX_MX29F001T	0x18