[flashrom-gerrit] Change in flashrom[master]: ichspi: Add Alder Lake support

[Subrata Banik (Code Review)]

Attention is currently required from: Sam McNally, Rizwan Qureshi, Edward O'Callaghan, Angel Pons.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 )

Change subject: ichspi: Add Alder Lake support
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Patch Set 10:

(2 comments)

File chipset_enable.c:

https://review.coreboot.org/c/flashrom/+/62251/comment/59c7d63d_3d86031b 
PS10, Line 2152:
> Looks like it's aligned properly on my computer.

Ack

https://review.coreboot.org/c/flashrom/+/62251/comment/bdd3f62a_fecc33ca 
PS10, Line 2154: 	{0x8086, 0x7aa4, B_S,    DEP, "Intel", "Alder Lake-S",			enable_flash_pch600},
> Have all three PCH types been tested?

I think we can drop ADL-S, I will pick the task of removing ADL-S from common code and SoC code if any.

for ADL-P, we have Brya and for ADL-N, we have Nissa to test on.