[flashrom-gerrit] Change in flashrom[master]: sst49lfxxxc.c: add unlock function for SST chips

[Edward O'Callaghan (Code Review)]

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/48108 )

Change subject: sst49lfxxxc.c: add unlock function for SST chips
......................................................................

Patch Set 1: Code-Review-1

(1 comment)

https://review.coreboot.org/c/flashrom/+/48108/1/sst49lfxxxc.c 
File sst49lfxxxc.c:

https://review.coreboot.org/c/flashrom/+/48108/1/sst49lfxxxc.c@32 
PS1, Line 32: write_lockbits_49lfxxxc
did this come from?

```
commit 9af0ce8bee6cb0ef2eece004799c184e9df9437d
Author: uwe 
Date:   Mon Jan 22 20:21:17 2007 +0000

Original v2 revision: 2537

Add support for the SST-49LF004C, SST-49LF008C, SST-49LF016C in flashrom.
    Also add suport for NVIDIA MCP55.

Signed-off-by: Yinghai Lu 
    Signed-off-by: Uwe Hermann 
    Acked-by: Peter Stuge

git-svn-id: svn://coreboot.org/flashrom/trunk@85 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
```

&& looks like it was removed in

```
commit ef3ac8ac17eac9d2041ea9c9e711a9b059412b59
Author: Carl-Daniel Hailfinger 
Date:   Sun Aug 3 13:05:34 2014 +0000

Refactor unlocking of many chips with locking at register space address +2

This includes PMC Pm49*, SST 49LF00*, ST M50* and Winbond W39* families.
    The erase and write test status bits of all affected chips have been reset.

Corresponding to flashrom svn r1833.

Signed-off-by: Carl-Daniel Hailfinger 
    Signed-off-by: Stefan Tauner 
    Acked-by: Stefan Tauner 
```