Attention is currently required from: Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58570 )
Change subject: spi25_statusreg,flashchips: add SR2 read/write support ......................................................................
Patch Set 22: Code-Review+1
(3 comments)
File flash.h:
https://review.coreboot.org/c/flashrom/+/58570/comment/dd5ef876_7b9908ed PS22, Line 145: #define FEATURE_RDSR2 (1 << 21) Isn't this implied by the above and function pointers that make use of it? If it is redundant, it only creates more things to check for in the code.
https://review.coreboot.org/c/flashrom/+/58570/comment/7504d340_cd9a710a PS22, Line 147: Only one empty line please.
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58570/comment/e90f6525_d12b5887 PS18, Line 6711: FEATURE_WRSR_EXT
At least according to datasheet rev 2. […]
Interesting, looks like the datasheet is inconsistent. It first states:
"CS# must be driven high after the eighth of the data Byte has been latched in. If not, the Write Status Register (WRSR) command is not executed."
Later it says one could write SR1 and SR2 with 01h...
I'd prefer to have it tested. And a comment about the datasheet oddity would be nice.