[flashrom-gerrit] Change in ...flashrom[master]: Fix several -Wno-implicit-fallthrough warnings

[Nico Huber (Code Review)]

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/30406 )

Change subject: Fix several -Wno-implicit-fallthrough warnings
......................................................................

Fix several -Wno-implicit-fallthrough warnings

GCC is picky about the comment being where the break should go.

Change-Id: I05db2fb34025fefe2c6ddd1274c8e45b7cc5a4b6
Signed-off-by: Richard Hughes 
Reviewed-on: https://review.coreboot.org/c/30406
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
Reviewed-by: Paul Menzel 
Reviewed-by: Angel Pons 
---
M ich_descriptors.c
M ichspi.c
M sb600spi.c
M spi25_statusreg.c
4 files changed, 9 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved
  Paul Menzel: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/ich_descriptors.c b/ich_descriptors.c
index 56e846f..944af4c 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -69,6 +69,7 @@
    case CHIPSET_C620_SERIES_LEWISBURG:
    	if (cont->NM <= MAX_NUM_MASTERS)
    		return cont->NM;
+		break;
    default:
    	if (cont->NM < MAX_NUM_MASTERS)
    		return cont->NM + 1;
@@ -238,6 +239,7 @@
    case CHIPSET_ICH10:
    	if (value > 1)
    		return "reserved";
+		/* Fall through. */
    case CHIPSET_5_SERIES_IBEX_PEAK:
    case CHIPSET_6_SERIES_COUGAR_POINT:
    case CHIPSET_7_SERIES_PANTHER_POINT:
diff --git a/ichspi.c b/ichspi.c
index 911f50a..0f1470d 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -891,7 +891,7 @@
    case 2:
    	/* Select second preop. */
    	temp16 |= SPIC_SPOP;
-		/* And fall through. */
+		/* Fall through. */
    case 1:
    	/* Atomic command (preop+op) */
    	temp16 |= SPIC_ACS;
@@ -1013,7 +1013,7 @@
    case 2:
    	/* Select second preop. */
    	temp32 |= SSFC_SPOP;
-		/* And fall through. */
+		/* Fall through. */
    case 1:
    	/* Atomic command (preop+op) */
    	temp32 |= SSFC_ACS;
diff --git a/sb600spi.c b/sb600spi.c
index 1e2e5d5..1efb2ce 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -638,6 +638,7 @@
    switch (amd_gen) {
    case CHIPSET_SB7XX:
    	msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1);
+		/* Fall through. */
    case CHIPSET_SB89XX:
    case CHIPSET_HUDSON234:
    case CHIPSET_YANGTZE:
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index a5fb3b8..4cf7023 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -269,19 +269,22 @@
 static void spi_prettyprint_status_register_bp(uint8_t status, int bp)
 {
    switch (bp) {
-	/* Fall through. */
    case 4:
    	msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n",
    		 (status & (1 << 6)) ? "" : "not ");
+		/* Fall through. */
    case 3:
    	msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
    		 (status & (1 << 5)) ? "" : "not ");
+		/* Fall through. */
    case 2:
    	msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n",
    		 (status & (1 << 4)) ? "" : "not ");
+		/* Fall through. */
    case 1:
    	msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n",
    		 (status & (1 << 3)) ? "" : "not ");
+		/* Fall through. */
    case 0:
    	msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n",
    		 (status & (1 << 2)) ? "" : "not ");