Attention is currently required from: Thomas Walker. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52310 )
Change subject: flashchips: Add Spansion/Cypress S25FL256L ......................................................................
Patch Set 5:
(3 comments)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/52310/comment/2410635f_8d3c0df5 PS5, Line 16387: FEATURE_4BA I see no mention of EAR (extended address register) in the datasheet, so that should be
FEATURE_4BA_ENTER | FEATURE_4BA_NATIVE
i.e. excluding FEATURE_4BA_EXT_ADDR
The problem with these big chips and their 4-byte addresses is that there are usually at least 3 different ways to do it and that makes things harder to test.
https://review.coreboot.org/c/flashrom/+/52310/comment/5e6c7f69_a228885c PS5, Line 16387: .feature_bits = FEATURE_WRSR_WREN | FEATURE_4BA, Could add FEATURE_OTP.
File spi25.c:
https://review.coreboot.org/c/flashrom/+/52310/comment/24661c19_68cd6979 PS5, Line 492: true Looks like we grouped the 4BA commands at the end. Not sure if it matters, though.