[flashrom-gerrit] Change in flashrom[master]: chipset_enable.c: Add Intel pch6 did=0x1e4{1,2,3} support

[Edward O'Callaghan (Code Review)]

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/47090 )

Change subject: chipset_enable.c: Add Intel pch6 did=0x1e4{1,2,3} support
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Patch Set 1:

(2 comments)

https://review.coreboot.org/c/flashrom/+/47090/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/flashrom/+/47090/1//COMMIT_MSG@7 
PS1, Line 7: pid
> did (Device ID)

Done

https://review.coreboot.org/c/flashrom/+/47090/1/chipset_enable.c 
File chipset_enable.c:

https://review.coreboot.org/c/flashrom/+/47090/1/chipset_enable.c@1842 
PS1, Line 1842: OK
> These should be `DEP` like the other PCHs are

Done