[flashrom-gerrit] Change in flashrom[master]: flashchips: Add Spansion S25FL512S

[David Hendricks (Code Review)]

David Hendricks has submitted this change. ( https://review.coreboot.org/c/flashrom/+/38596 )

Change subject: flashchips: Add Spansion S25FL512S
......................................................................

flashchips: Add Spansion S25FL512S

As found on the Tesla AP2.5 board.

Based on https://mail.coreboot.org/pipermail/flashrom/2013-June/011066.html

Tested with:
    flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 -r content.bin

Signed-off-by: Bernhard Urban-Forster 
Change-Id: Ifa9b7615951125b6bbc1f051370ef54896bf506c
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38596
Tested-by: build bot (Jenkins) 
Reviewed-by: David Hendricks 
---
M flashchips.c
1 file changed, 33 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  David Hendricks: Looks good to me, approved

diff --git a/flashchips.c b/flashchips.c
index 65dda0e..58dd4f3 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -15968,6 +15968,39 @@
    },

{
+		.vendor		= "Spansion",
+		.name		= "S25FL512S",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SPANSION_ID,
+		.model_id	= SPANSION_S25FL512,
+		.total_size	= 65536, /* 512 Mb (=> 64 MB)) */
+		.page_size	= 256,
+		/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_NATIVE,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { { 256 * 1024, 256} },
+				.block_erase = spi_block_erase_dc,
+			}, {
+				.eraseblocks = { { 65536 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { { 65536 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */
+		.unlock		= spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */
+		.write		= spi_chip_write_256, /* Multi I/O supported, IGNORE for now */
+		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
    	.vendor		= "SyncMOS/MoselVitelic",
    	.name		= "{F,S,V}29C51001B",
    	.bustype	= BUS_PARALLEL,