Attention is currently required from: Nicholas Chin, ZhiYuanNJ.
Hello Nicholas Chin, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/82776?usp=email
to look at the new patch set (#3).
Change subject: ch347_spi: Add spi clock frequency selection ......................................................................
ch347_spi: Add spi clock frequency selection
CH347 SPI interface supports up to 60M. For example, to set a 30M spi rate, use - p ch347_spi:spispeed=30M.
Change-Id: If2be48929db540a6598ac0b60b37e64597156db7 Signed-off-by: ZhiYuanNJ Liu 871238103@qq.com --- M ch347_spi.c 1 file changed, 37 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/76/82776/3